Issued Patents All Time
Showing 25 most recent of 155 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12393547 | Interface with variable data rate | Yohan U. Frans, Hae-Chang Lee, Simon Li, Nhat Nguyen | 2025-08-19 |
| 12316481 | Edge based partial response equalization | Hae-Chang Lee, Jihong Ren, Ruwan Ratnayake | 2025-05-27 |
| 12316482 | High-speed signaling systems and methods with adaptable, continuous-time equalization | Hae-Chang Lee, Jade M. Kizer, Thomas Hastings Greer, III, Akash Bansal | 2025-05-27 |
| 12278886 | Hybrid serial receiver circuit | Ryan D. Bartling, Jafar Savoj | 2025-04-15 |
| 12142348 | Memory device comprising programmable command-and-address and/or data interfaces | Ian Shaeffer, Lawrence Lai, Fan Ho, David A. Secker, Wayne S. Richardson +2 more | 2024-11-12 |
| 11990912 | Data transmission using delayed timing signals | Frederick A. Ware, Ely Tsern, Jared L. Zerbe | 2024-05-21 |
| 11886375 | Interface with variable data rate | Yohan U. Frans, Hae-Chang Lee, Simon Li, Nhat Nguyen | 2024-01-30 |
| 11783879 | Memory device comprising programmable command-and-address and/or data interfaces | Ian Shaeffer, Lawrence Lai, Fan Ho, David A. Secker, Wayne S. Richardson +2 more | 2023-10-10 |
| 11757681 | Serial data receiver circuit with dither assisted equalization | Jose A. Tierno, Haiming Jin, Sanjeev K. Maheshwari, Chintan S. Thakkar | 2023-09-12 |
| 11750325 | Self referenced single-ended chip to chip communication | Jafar Savoj, Praveen R. Singh, Emerson S. Fang | 2023-09-05 |
| 11736111 | Detecting power supply noise events and initiating corrective action | Jared L. Zerbe, Sanjay Pant | 2023-08-22 |
| 11689351 | Hybrid serial receiver circuit | Ryan D. Bartling, Jafar Savoj | 2023-06-27 |
| 11658671 | Latency reduction in analog-to-digital converter-based receiver circuits | Ryan D. Bartling, Jafar Savoj, Shah M. Sharif | 2023-05-23 |
| 11586240 | On-chip supply ripple tolerant clock distribution | Bo Sun, Jafar Savoj, Sanjeev K. Maheshwari | 2023-02-21 |
| 11539556 | Methods and circuits for asymmetric distribution of channel equalization between devices | Jared L. Zerbe, Fariborz Assaderaghi, Hae-Chang Lee, Jihong Ren, Qi Lin | 2022-12-27 |
| 11525854 | Integrated circuit having receiver jitter tolerance (“JTOL”) measurement | Hae-Chang Lee, Jaeha Kim | 2022-12-13 |
| 11502880 | Baseline wander cancelation | Ryan D. Bartling, Jafar Savoj | 2022-11-15 |
| 11489703 | Edge based partial response equalization | Hae-Chang Lee, Jihong Ren, Ruwan Ratnayake | 2022-11-01 |
| 11469927 | High-speed signaling systems and methods with adaptable, continuous-time equalization | Hae-Chang Lee, Jade M. Kizer, Thomas Hastings Greer, III, Akash Bansal | 2022-10-11 |
| 11451218 | Data transmission using delayed timing signals | Frederick A. Ware, Ely Tsern, Jared L. Zerbe | 2022-09-20 |
| 11392163 | On-chip supply ripple tolerant clock distribution | Bo Sun, Jafar Savoj, Sanjeev K. Maheshwari | 2022-07-19 |
| 11341079 | Interface with variable data rate | Yohan U. Frans, Hae-Chang Lee, Simon Li, Nhat Nguyen | 2022-05-24 |
| 11277254 | Receiver with enhanced clock and data recovery | Hae-Chang Lee, Jaeha Kim, Jafar Savoj | 2022-03-15 |
| 11211105 | Memory device comprising programmable command-and-address and/or data interfaces | Ian Shaeffer, Lawrence Lai, Fan Ho, David A. Secker, Wayne S. Richardson +2 more | 2021-12-28 |
| 11181941 | Using a stuttered clock signal to reduce self-induced voltage noise | Jared L. Zerbe | 2021-11-23 |