Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12282378 | Techniques for memory access in a reduced power state | Paul S. Diefenbaugh | 2025-04-22 |
| 11698673 | Techniques for memory access in a reduced power state | Paul S. Diefenbaugh | 2023-07-11 |
| 11256318 | Techniques for memory access in a reduced power state | Paul S. Diefenbaugh | 2022-02-22 |
| 10671740 | Supporting configurable security levels for memory address ranges | Raghunandan Makaram, Amy L. Santoni, George Z. Chrysos, Simon P. Johnson, Brian S. Morris +1 more | 2020-06-02 |
| 10230528 | Tree-less integrity and replay memory protection for trusted execution environment | Amy L. Santoni, Raghunandan Makaram, Francis X. McKeen, Simon P. Johnson, George Z. Chrysos +1 more | 2019-03-12 |
| 10185842 | Cache and data organization for memory protection | Siddhartha Chhabra, Raghunandan Makaram, Jim McCormick | 2019-01-22 |
| 10031861 | Protect non-memory encryption engine (non-mee) metadata in trusted execution environment | Siddhartha Chhabra, Raghunandan Makaram, Brian S. Morris | 2018-07-24 |
| 10007606 | Implementation of reserved cache slots in computing system having inclusive/non inclusive tracking and two level system memory | Vedaraman Geetha, Brian S. Morris, Massimo Sutera | 2018-06-26 |
| 9959418 | Supporting configurable security levels for memory address ranges | Raghunandan Makaram, Amy L. Santoni, George Z. Chrysos, Simon P. Johnson, Brian S. Morris +1 more | 2018-05-01 |
| 9893881 | Efficient sharing of hardware encryption pipeline for multiple security solutions | Siddhartha Chhabra, Evgeny Zhyvov, Eugene M. Kishinevsky, Men Long | 2018-02-13 |
| 9720488 | Apparatus, method, and system for early deep sleep state exit of a processing element | Jayakrishna Guddeti | 2017-08-01 |
| 9454218 | Apparatus, method, and system for early deep sleep state exit of a processing element | Jayakrishna Guddeti | 2016-09-27 |
| 9032125 | Increasing turbo mode residency of a processor | Jayakrishna Guddeti | 2015-05-12 |
| 9032126 | Increasing turbo mode residency of a processor | Jayakrishna Guddeti | 2015-05-12 |
| 8990602 | Apparatus, method, and system for early deep sleep state exit of a processing element | Jayakrishna Guddeti | 2015-03-24 |
| 8782468 | Methods and tools to debug complex multi-core, multi-socket QPI based system | Jayakrishna Guddeti, Keshavan Tiruvallur | 2014-07-15 |
| 8688883 | Increasing turbo mode residency of a processor | Jayakrishna Guddeti | 2014-04-01 |
| 7836229 | Synchronizing control and data paths traversed by a data transaction | Bipin Singh, Vivek Garg | 2010-11-16 |
| 7761696 | Quiescing and de-quiescing point-to-point links | Ling Cen, Rahul Pal, Binoy BALAN, Baskaran Ganesan | 2010-07-20 |
| 7600080 | Avoiding deadlocks in a multiprocessor system | Chandra P. Joshi, Chung-Chi Wang, Liang Yin, Vivek Garg, Phanindra Kumar Mannava | 2009-10-06 |