Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8209141 | System and method for automatically generating test patterns for at-speed structural test of an integrated circuit device using an incremental approach to reduce test pattern count | Robert W. Bassett, Vikram Iyengar | 2012-06-26 |
| 7900112 | System and method for digital logic testing | Kenneth Pichamuthu, Prakash Venkitaraman | 2011-03-01 |
| 7103816 | Method and system for reducing test data volume in the testing of logic products | Frank Distler, Leonard O. Farnsworth, III, Brion Keller, Bernd Koenemann, Donald L. Wheater | 2006-09-05 |
| 6782501 | System for reducing test data volume in the testing of logic products | Frank Distler, L. Farnsworth, Brion Keller, Bernd Koenemann | 2004-08-24 |