Issued Patents All Time
Showing 26–50 of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10504591 | Adaptive configuration of non-volatile memory | Rajesh Sundaram, David J. Zimmerman, Blaise Fanning | 2019-12-10 |
| 10437722 | Phase change memory in a dual inline memory module | Jared E. Hulbert | 2019-10-08 |
| 10381055 | Flexible DLL (delay locked loop) calibration | Michael J. Allen, Rajesh Sundaram | 2019-08-13 |
| 10331360 | Scalable bandwidth non-volatile memory | Rajesh Sundaram, Albert Fazio, Derchang Kau | 2019-06-25 |
| 10324793 | Reduced uncorrectable memory errors | Kiran Pangal, Prashant S. Damle, Rajesh Sundaram, Julie M. Walker, Doyle Rivers | 2019-06-18 |
| 10241710 | Multi-level memory with direct access | Blaise Fanning, Raymond S. Tetrick, Frank T. Hady | 2019-03-26 |
| 10152262 | Memory access techniques in memory devices with multiple partitions | Rajesh Sundaram | 2018-12-11 |
| 10056139 | Managing threshold voltage shift in nonvolatile memory | Rajesh Sundaram, Prashant S. Damle, Doyle Rivers, Julie M. Walker | 2018-08-21 |
| 10026475 | Adaptive configuration of non-volatile memory | Rajesh Sundaram, David J. Zimmerman, Blaise Fanning | 2018-07-17 |
| 10025737 | Interface for storage device access over memory bus | Rajesh Sundaram, David J. Zimmerman, Robert W. Faber | 2018-07-17 |
| 9934088 | Reduced uncorrectable memory errors | Kiran Pangal, Prashant S. Damle, Rajesh Sundaram, Julie M. Walker, Doyle Rivers | 2018-04-03 |
| 9721657 | Managing threshold voltage shift in nonvolatile memory | Rajesh Sundaram, Prashant S. Damle, Doyle Rivers, Julie M. Walker | 2017-08-01 |
| 9703502 | Multi-level memory with direct access | Blaise Fanning, Raymond S. Tetrick, Frank T. Hady | 2017-07-11 |
| 9612835 | MFENCE and LFENCE micro-architectural implementation method and system | Salvador Palanca, Stephen A. Fischer, Subramaniam Maiyuran | 2017-04-04 |
| 9576662 | Phase change memory in a dual inline memory module | Jared E. Hulbert | 2017-02-21 |
| 9430151 | Multi-level memory with direct access | Blaise Fanning, Raymond S. Tetrick, Frank T. Hady | 2016-08-30 |
| 9383998 | MFENCE and LFENCE micro-architectural implementation method and system | Salvador Palanca, Stephen A. Fischer, Subramaniam Maiyuran | 2016-07-05 |
| 9274885 | Phase change memory with switch (PCMS) write error detection | Rajesh Sundaram | 2016-03-01 |
| 9195589 | Adaptive configuration of non-volatile memory | Rajesh Sundaram, David J. Zimmerman, Blaise Fanning | 2015-11-24 |
| 9190124 | Multi-level memory with direct access | Blaise Fanning, Raymond S. Tetrick, Frank T. Hady | 2015-11-17 |
| 9136873 | Reduced uncorrectable memory errors | Kiran Pangal, Prashant S. Damle, Rajesh Sundaram, Julie M. Walker, Doyle Rivers | 2015-09-15 |
| 9098268 | MFENCE and LFENCE micro-architectural implementation method and system | Salvador Palanca, Stephen A. Fischer, Subramaniam Maiyuran | 2015-08-04 |
| 9064560 | Interface for storage device access over memory bus | Rajesh Sundaram, David J. Zimmerman, Robert W. Faber | 2015-06-23 |
| 8959314 | MFENCE and LFENCE micro-architectural implementation method and system | Salvador Palanca, Stephen A. Fischer, Subramaniam Maiyuran | 2015-02-17 |
| 8626997 | Phase change memory in a dual inline memory module | Jared E. Hulbert | 2014-01-07 |