Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8863061 | Application-specific integrated circuit equivalents of programmable logic and associated methods | Kar Keng Chua, Hee Kong Phoon, Kim Pin Tan, Wei Lian Goay | 2014-10-14 |
| 8504963 | Application-specific integrated circuit equivalents of programmable logic and associated methods | Kar Keng Chua, Hee Kong Phoon, Kim Pin Tan, Wei Lian Goay | 2013-08-06 |
| 8291355 | Application-specific integrated circuit equivalents of programmable logic and associated methods | Kar Keng Chua, Hee Kong Phoon, Kim Pin Tan, Wei Lian Goay | 2012-10-16 |
| 7870513 | Application-specific integrated circuit equivalents of programmable logic and associated methods | Kar Keng Chua, Hee Kong Phoon, Kim Pin Tan, Wei Lian Goay | 2011-01-11 |
| 7243329 | Application-specific integrated circuit equivalents of programmable logic and associated methods | Kar Keng Chua | 2007-07-10 |
| 6599764 | Isolation testing scheme for multi-die packages | Boon Jin Ang, Kar Keng Chua | 2003-07-29 |
| 6577157 | Fully programmable I/O pin with memory | Krishna Rangasayee | 2003-06-10 |
| 6489817 | Clock divider using positive and negative edge triggered state machines | Choong Kit Wong, Boon Jin Ang | 2002-12-03 |
| 6281704 | High-performance interconnect | Tony Ngai, Sergey Shumarayev, Rakesh Patel, Vinson Chan | 2001-08-28 |
| 6239615 | High-performance interconnect | Tony Ngai, Sergey Shumarayev, Rakesh Patel, Vinson Chan | 2001-05-29 |
| 6154059 | High performance output buffer | John Lam, Rakesh Patel, Tony Ngai | 2000-11-28 |
| 5936973 | Test mode latching scheme | Simon J. Lovett, A. Majid Farmanfarmaian, Mark Rouse | 1999-08-10 |
| 5604711 | Low power high voltage switch with gate bias circuit to minimize power consumption | — | 1997-02-18 |
| 5572474 | Pseudo-differential sense amplifier | Ben Sheen, Timothy M. Lacey | 1996-11-05 |
| 5568081 | Variable slew control for output buffers | Henry Y. Lui | 1996-10-22 |