Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7386654 | Non-volatile configuration data storage for a configurable memory | Lance W. Dover, Chaitanya Rajguru | 2008-06-10 |
| 6628552 | Self-configuring input buffer on flash memories | Harry Q. Pon | 2003-09-30 |
| 6260103 | Read-while-write memory including fewer verify sense amplifiers than read sense amplifiers | Ranjeet Alexis | 2001-07-10 |
| 6223290 | Method and apparatus for preventing the fraudulent use of a cellular telephone | Peter K. Hazen, Sandeep Guliani, Robert Nasry Hasbun, Sanjay S. Talreja, Collin Ong +2 more | 2001-04-24 |
| 6182189 | Method and apparatus for placing a memory in a read-while-write mode | Ranjeet Alexis, Peter K. Hazen, Charles W. Brown | 2001-01-30 |
| 6154819 | Apparatus and method using volatile lock and lock-down registers and for protecting memory blocks | Peter K. Hazen, Sanjay S. Talreja, Sandeep Guliani, Robert Nasry Hasbun, Collin Ong +3 more | 2000-11-28 |
| 6150835 | Method and apparatus for fast production programming and low-voltage in-system writes for programmable logic device | Peter K. Hazen, Sandeep Guliani | 2000-11-21 |
| 6088264 | Flash memory partitioning for read-while-write operation | Peter K. Hazen, Ranjeet Alexis, Charles W. Brown, Sanjay S. Talreja | 2000-07-11 |
| 5933026 | Self-configuring interface architecture on flash memories | Harry Q. Pon, Sanjay S. Talreja, Marcus E. Landgraf, Ranjeet Alexis | 1999-08-03 |
| 5903500 | 1.8 volt output buffer on flash memories | Wai Keung Tsang, Harry Q. Pon | 1999-05-11 |
| 5896338 | Input/output power supply detection scheme for flash memory | Marcus E. Landgraf, Mase J. Taub, Sanjay S. Talreja, Vishram Prakash Dalvi, Edward Babb +2 more | 1999-04-20 |
| 5798971 | Nonvolatile memory with output mode configuration | Richard J. Durante | 1998-08-25 |
| 5537350 | Method and apparatus for sequential programming of the bits in a word of a flash EEPROM memory array | Jahanshir J. Javanifard | 1996-07-16 |
| 5455794 | Method and apparatus for controlling the output current provided by a charge pump circuit | Jahanshir J. Javanifard, Albert Fazio, James Brennan, Jr., Kerry D. Tedrow | 1995-10-03 |
| 5442586 | Method and apparatus for controlling the output current provided by a charge pump circuit | Jahanshir J. Javanifard, Albert Fazio, James Brennan, Jr., Kerry D. Tedrow | 1995-08-15 |
| 5414669 | Method and apparatus for programming and erasing flash EEPROM memory arrays utilizing a charge pump circuit | Kerry D. Tedrow, Chaitanya Rajguru, Cesar Galindo, Jahanshir J. Jayanifard, Mase J. Taub | 1995-05-09 |
| 5257221 | Apparatus for selecting mumber of wait states in a burst EPROM architecture | David A. Leak, Joseph H. Salmon | 1993-10-26 |
| 5255230 | Method and apparatus for testing the continuity of static random access memory cells | James Chan, Steve R. Eskildsen | 1993-10-19 |
| 5243700 | Port expander architecture for mapping a first set of addresses to external memory and mapping a second set of addresses to an I/O port | Khandker N. Quader, Joseph H. Salmon, Terry L. Kendall | 1993-09-07 |
| 5170073 | Ultra-low noise port output driver circuit | Michael Hahn, Joseph H. Salmon | 1992-12-08 |
| 5159672 | Burst EPROM architecture | Joseph H. Salmon, David A. Leak, Kurt B. Robinson, Dhiraj Parmar | 1992-10-27 |
| 5077738 | Test mode enable scheme for memory | Khandker N. Quader, Joseph H. Salmon | 1991-12-31 |
| 5057715 | CMOS output circuit using a low threshold device | Khandker N. Quader, Joseph H. Salmon | 1991-10-15 |