Pradeep Nagarajan — 15 Patents at Intel

Pradeep Nagarajan has been granted 15 US patents while listed as an inventor at Intel. The first was granted in 2011 and the most recent in December 2025. Pradeep Nagarajan ranks #307,048 of 4,157,543 US inventors in our database (top 7.4%). Patent records list Pradeep Nagarajan in San Jose, CA, US.

Issued Patents All Time

Showing 1–15 of 15 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12492905	Computer-implemented system and method to track, monitor, store, and report the location and dwell time of airport passengers and vehicles at airport checkpoints and facilities	Balaji Karuppiah, Dhamotharakkannan Seenivasagam, Goutam Kundu, Justin Dominic Grasso, Satyanarayana Ramisetty +3 more	2025-12-09
11138126	Testing hierarchical address translation with context switching and overwritten table definition data	—	2021-10-05
10084591	SERDES built-in sinusoidal jitter injection	Chaitanya Palusa, Dawei Huang, Jiangyuan Li	2018-09-25	$57,461,000
9711189	On-die input reference voltage with self-calibrating duty cycle correction	Bonnie I. Wang, Chiakang Sung, Xiaobao Wang, Yan Chong, Joseph Huang +1 more	2017-07-18
9158873	Circuit design technique for DQS enable/disable calibration	Yan Chong, Joseph Huang, Sean Shau-Tu Lu, Chiakang Sung	2015-10-13	$34,312,000
9059716	Digital PVT compensation for delay chain	Yan Chong, Sean Shau-Tu Lu, Chiakang Song, Joseph Huang	2015-06-16	$26,228,000
8847626	Circuits and methods for providing clock signals	Yan Chong, Warren Nordyke, James Lin, Weiqi Ding	2014-09-30	$16,609,000
8787097	Circuit design technique for DQS enable/disable calibration	Yan Chong, Joseph Huang, Sean Shau-Tu Lu, Chiakang Sung	2014-07-22	$4,171,000
8680905	Digital PVT compensation for delay chain	Yan Chong, Sean Shau-Tu Lu, Chiakang Sung, Joseph Huang	2014-03-25	$11,711,000
8624647	Duty cycle correction circuit for memory interfaces in integrated circuits	Yan Chong, Joseph Huang, Chiakang Sung	2014-01-07	$7,384,000
8565034	Variation compensation circuitry for memory interface	Sean Shau-Tu Lu, Joseph Huang, Yan Chong, Chiakang Sung	2013-10-22	$14,792,000
8237475	Techniques for generating PVT compensated phase offset to improve accuracy of a locked loop	Sean Shau-Tu Lu, Chiakang Sung, Joseph Huang, Yan Chong	2012-08-07	$22,321,000
8159277	Techniques for providing multiple delay paths in a delay circuit	Yan Chong, Chiakang Sung, Joseph Huang	2012-04-17	$12,323,000
8130016	Techniques for providing reduced duty cycle distortion	Yan Chong, Chiakang Sung, Joseph Huang	2012-03-06	$10,962,000
7893739	Techniques for providing multiple delay paths in a delay circuit	Yan Chong, Chiakang Sung, Joseph Huang	2011-02-22	$10,897,000

Pradeep Nagarajan — 15 Patents

Issued Patents All Time

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