Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431907 | Duty-cycle matched differential clock divider circuit | Ryan A. Scott | 2025-09-30 |
| 11899480 | Voltage regulator with enhanced transient regulation and low-power sub regulator | Colin Tse | 2024-02-13 |
| 11621539 | Multi-phase laser driver techniques | Shawn S. Kuo, Ronald A. Kapusta | 2023-04-04 |
| 10985761 | Fractional divider | — | 2021-04-20 |
| 10866607 | Voltage regulator circuit with correction loop | Celal Avci, Shawn S. Kuo | 2020-12-15 |
| 10578435 | Quality factor compensation in microelectromechanical system (MEMS) gyroscopes | Ronald A. Kapusta, Lijun Gao | 2020-03-03 |
| 10309782 | Quality factor estimation for resonators | Ronald A. Kapusta, Jiefeng Yan | 2019-06-04 |
| 9024682 | Proportional-to-supply analog current generator | Boris Krnic | 2015-05-05 |
| 8847626 | Circuits and methods for providing clock signals | Yan Chong, Warren Nordyke, Pradeep Nagarajan, Weiqi Ding | 2014-09-30 |
| 7279938 | Delay chain integrated circuits having binary-weighted delay chain units with built-in phase comparators therein | — | 2007-10-09 |
| 7119591 | Delay-locked loop (DLL) integrated circuits having binary-weighted delay chain units with built-in phase comparators that support efficient phase locking | — | 2006-10-10 |
| 7109760 | Delay-locked loop (DLL) integrated circuits that support efficient phase locking of clock signals having non-unity duty cycles | — | 2006-09-19 |
| 6924994 | Content addressable memory (CAM) devices having scalable multiple match detection circuits therein | Chau-Chin Wu | 2005-08-02 |
| 6859378 | Multiple match detection logic and gates for content addressable memory (CAM) devices | Chau-Chin Wu | 2005-02-22 |