CW

Chau-Chin Wu

IT Integrated Device Technology: 37 patents #2 of 758Top 1%
NM Netlogic Microsystems: 2 patents #83 of 186Top 45%
Overall (All Time): #80,140 of 4,157,543Top 2%
40
Patents All Time

Issued Patents All Time

Showing 25 most recent of 40 patents

Patent #TitleCo-InventorsDate
7859876 Method and apparatus for CAM with reduced cross-coupling interference Chuen-Der Lien 2010-12-28
RE41351 CAM arrays having CAM cells therein with match line and low match line connections and methods of operating same Chuen-Der Lien 2010-05-25
7545660 Method and apparatus for CAM with reduced cross-coupling interference Chuen-Der Lien 2009-06-09
7522438 Method and apparatus for CAM with reduced cross-coupling interference Chuen-Der Lien 2009-04-21
7414460 System and method for integrated circuit charge recycling Chuen-Der Lien, Tzong-Kwang Henry Yeh 2008-08-19
7359275 Reduced size dual-port SRAM cell 2008-04-15
7304875 Content addressable memory (CAM) devices that support background BIST and BISR operations and methods of operating same Chuen-Der Lien, Michael J. Miller, Kee Park, Scott Yu-Fan Chu 2007-12-04
7248492 Method and apparatus for CAM with reduced cross-coupling interference Chuen-Der Lien 2007-07-24
7187571 Method and apparatus for CAM with reduced cross-coupling interference Chuen-Der Lien 2007-03-06
RE39227 Content addressable memory (CAM) arrays and cells having low power requirements Chuen-Der Lien 2006-08-08
6924994 Content addressable memory (CAM) devices having scalable multiple match detection circuits therein James Lin 2005-08-02
6879504 Content addressable memory (CAM) devices having error detection and correction control circuits therein and methods of operating same Chuen-Der Lien, Kee Park, Mark Baumann 2005-04-12
6859378 Multiple match detection logic and gates for content addressable memory (CAM) devices James Lin 2005-02-22
6781857 Content addressable memory (CAM) devices that utilize multi-port CAM cells and control logic to support multiple overlapping search cycles that are asynchronously timed relative to each other Chuen-Der Lien, Mark Baumann 2004-08-24
6724601 ESD protection circuit Chuen-Der Lien, Ta-Ke Tien 2004-04-20
6661687 Cam circuit with separate memory and logic operating voltages Chuen-Der Lien 2003-12-09
6657878 Content addressable memory (CAM) devices having reliable column redundancy characteristics and methods of operating same Chuen-Der Lien 2003-12-02
6563754 DRAM circuit with separate refresh memory Chuen-Der Lien 2003-05-13
6512685 CAM circuit with separate memory and logic operating voltages Chuen-Der Lien 2003-01-28
6505271 Increasing priority encoder speed using the most significant bit of a priority address Chuen-Der Lien 2003-01-07
6470418 Pipelining a content addressable memory cell array for low-power operation Chuen-Der Lien, John R. Mick 2002-10-22
6421265 DRAM-based CAM cell using 3T or 4T DRAM cells Chuen-Der Lien, Ta-Ke Tien 2002-07-16
6400593 Ternary CAM cell with DRAM mask circuit Chuen-Der Lien 2002-06-04
6388499 Level-shifting signal buffers that support higher voltage power supplies using lower voltage MOS technology Ta-Ke Tien 2002-05-14
6373739 Quad CAM cell with minimum cell size Chuen-Der Lien 2002-04-16