TT

Ta-Ke Tien

IT Integrated Device Technology: 14 patents #24 of 758Top 4%
IT Integrated Device Technologies: 1 patents #1 of 20Top 5%
Overall (All Time): #325,934 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7706113 Electrical overstress (EOS) and electrostatic discharge (ESD) protection circuit and method of use Chuen-Der Lien 2010-04-27
7522395 Electrostatic discharge and electrical overstress protection circuit Tar Hear Maung 2009-04-21
7474011 Method for improved single event latch up resistance in an integrated circuit Chuen-Der Lien, Pao-Lu Louis Huang 2009-01-06
7102862 Electrostatic discharge protection circuit Chuen-Der Lien 2006-09-05
6724601 ESD protection circuit Chuen-Der Lien, Chau-Chin Wu 2004-04-20
6421265 DRAM-based CAM cell using 3T or 4T DRAM cells Chuen-Der Lien, Chau-Chin Wu 2002-07-16
6388499 Level-shifting signal buffers that support higher voltage power supplies using lower voltage MOS technology Chau-Chin Wu 2002-05-14
6307399 High speed buffer circuit with improved noise immunity Chuen-Der Lien 2001-10-23
6204557 Reduction of topside movement during temperature cycles Chuen-Der Lien, Chun-Ya Chen, Pauli Hsueh, Leonard Perham 2001-03-20
6037807 Synchronous sense amplifier with temperature and voltage compensated translator Chau-Chin Wu, Wen-Kuan Fang 2000-03-14
5994945 Circuit for compensating for variations in both temperature and supply voltage Chau-Chin Wu, Kuo-Huei Yen 1999-11-30
5517131 TTL input buffer with on-chip reference bias regulator and decoupling capacitor Chau-Chin Wu, Richard C. Li 1996-05-14
5483183 Bipolar current sense amplifier Richard C. Li, Chau-Chin Wu 1996-01-09
5376843 TTL input buffer with on-chip reference bias regulator and decoupling capacitor Chau-Chin Wu, Richard C. Li 1994-12-27
5341333 Circuits and methods for amplification of electrical signals Chau-Chin Wu 1994-08-23