Issued Patents All Time
Showing 26–47 of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6745289 | Processing packets in cache memory | Frederick Gruner, Elango Ganesan, Ramesh Panwar | 2004-06-01 |
| 6581154 | Expanding microcode associated with full and partial width macroinstructions | — | 2003-06-17 |
| 6574689 | Method and apparatus for live-lock prevention | Jeen-Yuan Miin | 2003-06-03 |
| 6542981 | Microcode upgrade and special function support by executing RISC instruction to invoke resident microcode | Gary N. Hammond, Kin-Yip Liu, Tse-Yu Yeh | 2003-04-01 |
| 6523106 | Method and apparatus for efficient pipelining | Michael Mroczek, Umberto Santoni, Mike Morrison | 2003-02-18 |
| 6405307 | Apparatus and method for detecting and handling self-modifying code conflicts in an instruction fetch pipeline | Keshavram N. Murty | 2002-06-11 |
| 6363408 | Method and apparatus for summing selected bits from a plurality of machine vectors | Umair A. Khan | 2002-03-26 |
| 6292882 | Method and apparatus for filtering valid information for downstream processing | Umair A. Khan | 2001-09-18 |
| 6237088 | System and method for tracking in-flight instructions in a pipeline | — | 2001-05-22 |
| 6216221 | Method and apparatus for expanding instructions | Michael J. Morrison, Bharat Zaveri | 2001-04-10 |
| 6065105 | Dependency matrix | Gary N. Hammond, Ken Shoemaker, Jeff Baxter | 2000-05-16 |
| 6055652 | Multiple segment register use with different operand size | Kenneth D. Shoemaker, Gary N. Hammond | 2000-04-25 |
| 6049897 | Multiple segment register use with different operand size | Kenneth D. Shoemaker, Gary N. Hammond | 2000-04-11 |
| 6044456 | Electronic system and method for maintaining synchronization of multiple front-end pipelines | Keshavram N. Murty, Darshana S. Shah, Tse-Yu Yeh | 2000-03-28 |
| 6032250 | Method and apparatus for identifying instruction boundaries | — | 2000-02-29 |
| 6016540 | Method and apparatus for scheduling instructions in waves | Gary N. Hammond, Ken Shoemaker | 2000-01-18 |
| 5996064 | Method and apparatus for guaranteeing minimum variable schedule distance by using post-ready latency | Michael J. Morrison, Elango Ganesan | 1999-11-30 |
| 5961615 | Method and apparatus for queuing data | Michael J. Morrison, Bharat Zaveri | 1999-10-05 |
| 5961630 | Method and apparatus for handling dynamic structural hazards and exceptions by using post-ready latency | Michael J. Morrison, Elango Ganesan | 1999-10-05 |
| 5954814 | System for using a branch prediction unit to achieve serialization by forcing a branch misprediction to flush a pipeline | Deepak Aatresh, Michael J. Morrison | 1999-09-21 |
| 5944818 | Method and apparatus for accelerated instruction restart in a microprocessor | Jeff Baxter, Mike Morrison, Anand Pai | 1999-08-31 |
| 5918031 | Computer utilizing special micro-operations for encoding of multiple variant code flows | Michael J. Morrison, Andrew Paul Kelm, Bharat Zaveri | 1999-06-29 |