DA

Deepak Aatresh

AD Aditazz: 4 patents #2 of 23Top 9%
IN Intel: 4 patents #8,473 of 30,777Top 30%
AT AT&T: 1 patents #10,626 of 18,772Top 60%
CS Cabletron Systems: 1 patents #92 of 189Top 50%
RN Riverstone Networks: 1 patents #6 of 19Top 35%
Alcatel Lucent: 1 patents #594 of 1,504Top 40%
Overall (All Time): #417,952 of 4,157,543Top 15%
12
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10452790 System and method for evaluating the energy use of multiple different building massing configurations Sungmin Kim, Robert C. U. Yu 2019-10-22
9721046 System and method for realizing a building system that involves computer based matching of form to function Alexander Khainson, Zachary Deretsky, Ward Vercruysse, Richard L. Sarao, Sudha Hajela 2017-08-01
9607110 System and method for realizing a building system Ward Vercruysse, Zigmund Rubel 2017-03-28
9507885 System and method for realizing a building using automated building massing configuration generation Robert C. U. Yu, Sungmin Kim 2016-11-29
7652988 Hardware-based rate control for bursty traffic Sanjay Jain, Daniel M. Hegglin 2010-01-26
7352761 Distributing unused allocated bandwidth using a borrow vector Sandeep Lodha, Rajesh Narayanan, Raymond Vaughan-Williams 2008-04-01
6798741 Method and system for rate shaping in packet-based computer networks Sandeep Lodha 2004-09-28
6067301 Method and apparatus for forwarding packets from a plurality of contending queues to an output 2000-05-23
5954814 System for using a branch prediction unit to achieve serialization by forcing a branch misprediction to flush a pipeline Nazar Zaidi, Michael J. Morrison 1999-09-21
5586332 Power management for low power processors through the use of auto clock-throttling Sanjay Jain 1996-12-17
5469544 Central processing unit address pipelining Tosaku Nakanishi, Gregory S. Mathews 1995-11-21
5398244 Method and apparatus for reduced latency in hold bus cycles Gregory S. Mathews, Sanjay Jain 1995-03-14