Issued Patents All Time
Showing 51–75 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9811342 | Method for performing dual dispatch of blocks and half blocks | — | 2017-11-07 |
| 9766893 | Executing instruction sequence code blocks by using virtual cores instantiated by partitionable engines | — | 2017-09-19 |
| 9753691 | Method for a stage optimized high speed adder | — | 2017-09-05 |
| 9753734 | Method and apparatus for sorting elements in hardware structures | Mandeep Singh | 2017-09-05 |
| 9753856 | Variable caching structure for managing physical storage | — | 2017-09-05 |
| 9740612 | Systems and methods for maintaining the coherency of a store coalescing cache and a load cache | Karthikeyan Avudaiyappan | 2017-08-22 |
| 9697131 | Variable caching structure for managing physical storage | — | 2017-07-04 |
| 9678755 | Instruction sequence buffer to enhance branch prediction efficiency | — | 2017-06-13 |
| 9678882 | Systems and methods for non-blocking implementation of cache flush instructions | Karthikeyan Avudaiyappan | 2017-06-13 |
| 8732226 | Integer rounding operation | Chad D. Hancock, Kwok W. Lui | 2014-05-20 |
| 7761694 | Execution unit for performing shuffle and other operations | Hon Shing Lau, Shou-Wen Fu, Aviel Timor, Tal Gat | 2010-07-20 |
| 7516307 | Processor for computing a packed sum of absolute differences and packed multiply-add | Vladimir Pentkovski | 2009-04-07 |
| 7480360 | Regulating a timing between a strobe signal and a data signal | Bruce Querbach, Amjad Khan, Mir M. Hossain, Sanjib Sarkar | 2009-01-20 |
| 7467286 | Executing partial-width packed data instructions | James S. Coke, Vladimir Pentkovski, Patrice Roussel, Shreekant S. Thakkar | 2008-12-16 |
| 7430656 | System and method of converting data formats and communicating between execution units | Zeev Sperber, Ittai Anati, Oded Liron | 2008-09-30 |
| 7216138 | Method and apparatus for floating point operations and format conversion operations | Prasad Modali, Thomas R. Huff, Vladimir Pentkovski, Patrice Roussel, Shreekant S. Thakkar +1 more | 2007-05-08 |
| 7133040 | System and method for performing an insert-extract instruction | Srinivas Chennupaty, Robert S. Dreyer, Michael A. Julier, Katherine Kong, Larry M. Mennemeier +1 more | 2006-11-07 |
| 6970994 | Executing partial-width packed data instructions | James S. Coke, Vladimir Pentkovski, Patrice Roussel, Shreekant S. Thakkar | 2005-11-29 |
| 6918032 | Hardware predication for conditional instruction path branching | Khalid Al-Dajani | 2005-07-12 |
| 6754812 | Hardware predication for conditional instruction path branching | Khalid Al-Dajani | 2004-06-22 |
| 6718440 | Memory access latency hiding with hint buffer | Subramaniam Maiyuran, Vivek Garg, Jagannath Keshava | 2004-04-06 |
| 6701414 | System and method for prefetching data into a cache based on miss distance | Khalid Al-Dajani | 2004-03-02 |
| 6584549 | System and method for prefetching data into a cache based on miss distance | Khalid Al-Dajani | 2003-06-24 |
| 6502115 | Conversion between packed floating point data and packed 32-bit integer data in different architectural registers | Hsien-Cheng E. Hsieh, Thomas R. Huff, Vladimir Pentkovski, Patrice Roussel, Shreekant S. Thakkar | 2002-12-31 |
| 6498605 | Pixel span depth buffer | — | 2002-12-24 |