MH

MD Altaf Hossain

IN Intel: 48 patents #671 of 30,777Top 3%
TR Tahoe Research: 1 patents #81 of 215Top 40%
📍 Portland, OR: #335 of 9,213 inventorsTop 4%
🗺 Oregon: #686 of 28,073 inventorsTop 3%
Overall (All Time): #53,318 of 4,157,543Top 2%
50
Patents All Time

Issued Patents All Time

Showing 26–50 of 50 patents

Patent #TitleCo-InventorsDate
11528809 Method for orienting solder balls on a BGA device Scott Gilbert 2022-12-13
11500412 Techniques for clock signal transmission in integrated circuits and interposers Jeffrey Christopher Chromczak, Chooi Pei Lim, Lai Guan Tang, Chee Hak Teh, Dheeraj Subbareddy +1 more 2022-11-15
11476185 Innovative way to design silicon to overcome reticle limit Dinesh Somasekhar, Dheeraj Subbareddy 2022-10-18
11342238 Rotatable architecture for multi-chip package (MCP) Ankireddy Nalamalpu, Dheeraj Subbareddy 2022-05-24
11216397 Translation circuitry for an interconnection in an active interposer of a semiconductor package Lai Guan Tang, Ankireddy Nalamalpu, Dheeraj Subbareddy, Chee Hak Teh 2022-01-04
11121109 Innovative interconnect design for package architecture to improve latency Ankireddy Nalamalpu, Dheeraj Subbareddy 2021-09-14
11080449 Modular periphery tile for integrated circuit device Chee Hak Teh, Ankireddy Nalamalpu, Dheeraj Subbareddy, Sean R. Atsatt, Lai Guan Tang 2021-08-03
11070209 Programmable logic device with fine-grained disaggregation Dheeraj Subbareddy, Ankireddy Nalamalpu, Robert Sankman, Ravindranath V. Mahajan, Gregg William Baeckler 2021-07-20
11056452 Interface bus for inter-die communication in a multi-chip package over high density interconnects Dheeraj Subbareddy, Ankireddy Nalamalpu 2021-07-06
10980134 Method for orienting solder balls on a BGA device Scott Gilbert 2021-04-13
10950537 Land side and die side cavities to reduce package z-height Scott Gilbert 2021-03-16
10642946 Modular periphery tile for integrated circuit device Chee Hak Teh, Ankireddy Nalamalpu, Dheeraj Subbareddy, Sean R. Atsatt, Lai Guan Tang 2020-05-05
10601426 Programmable logic device with fine-grained disaggregation Dheeraj Subbareddy, Ankireddy Nalamalpu, Robert Sankman, Ravindranath V. Mahajan, Gregg William Baeckler 2020-03-24
10297542 Land side and die side cavities to reduce package z-height Scott Gilbert 2019-05-21
10278292 Method for orienting solder balls on a BGA device Scott Gilbert 2019-04-30
9961769 Microelectronic substrate for alternate package functionality Cliff C. Lee, David W. Browning, Itai M. Pines, Brian P. Kelly 2018-05-01
9940984 Shared command address (C/A) bus for multiple memory channels Nagi Aboulenein, Jayapratap Bharathan 2018-04-10
9799556 Land side and die side cavities to reduce package z-height Scott Gilbert 2017-10-24
9721882 Land side and die side cavities to reduce package z-height Scott Gilbert 2017-08-01
9480162 Circuit board with integrated passive devices Jin Zhao, John Vu 2016-10-25
9293426 Land side and die side cavities to reduce package Z-height Scott Gilbert 2016-03-22
9268724 Configuration of data strobes Kevin J. Doran, Nagi Aboulenein 2016-02-23
9237659 BGA structure using CTF balls in high stress regions Scott Gilbert 2016-01-12
8683096 Configuration of data strobes Kevin J. Doran, Nagi Aboulenein 2014-03-25
8674235 Microelectronic substrate for alternate package functionality Cliff C. Lee, David W. Browning, Itai M. Pines, Brian P. Kelly 2014-03-18