LT

Larry R. Tate

IN Intel: 11 patents #3,700 of 30,777Top 15%
AT AT&T: 5 patents #3,608 of 18,772Top 20%
AG Agere Systems Guardian: 3 patents #85 of 810Top 15%
AS Agere Systems: 1 patents #984 of 1,849Top 55%
HP Harris Semiconductor Patents: 1 patents #5 of 23Top 25%
Overall (All Time): #209,801 of 4,157,543Top 6%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9465237 Automatic focus prescription lens eyeglasses Simon N. Peffers 2016-10-11
9054902 Apparatus and system for switching equalization Sanquan Song, Jian Xu 2015-06-09
8428114 Transmit equalizer compensation for probe receivers Harry Rogers 2013-04-23
7917828 Providing error correction coding for probed data Richard Glass, Sanjay Dabral, Colin Looi 2011-03-29
7900098 Receiver for recovering and retiming electromagnetically coupled data Matthew Becker, Zibing Yang, Qiang Zhang, Todd Hinck 2011-03-01
7769109 Method and apparatus to perform modulation using integer timing relationships between intra symbol modulation components 2010-08-03
7660349 Transmit equalizer compensation for probe receivers Harry Rogers 2010-02-09
7605671 Component-less termination for electromagnetic couplers used in high speed/frequency differential signaling Tao Liang, Bo Zhang, John Critchlow, Timothy Wig 2009-10-20
7525723 Circuit board-to-circuit board connectors having electro-optic modulators Sanjay Dabral, Mohiuddin M. Mazumder, Hai Feng Liu 2009-04-28
7480330 Method and apparatus to perform modulation using integer timing relationships between intra symbol modulation components 2009-01-20
7342969 Signaling with multiple clocks Timothy Wig 2008-03-11
6530014 Near-orthogonal dual-MAC instruction set architecture with minimal encoding bits Mazhar M. Alidina, Mark E. Thierbach, Sivanand Simanapalli 2003-03-04
6467035 System and method for performing table look-ups using a multiple data fetch architecture Mark E. Thierbach 2002-10-15
6446193 Method and apparatus for single cycle processing of data associated with separate accumulators in a dual multiply-accumulate architecture Mazhar M. Alidina, Sivanand Simanapalli 2002-09-03
6272188 Single-cycle accelerator for extremun state search Mohammad S. Mobin, Sivanand Simanapalli 2001-08-07
6115805 Non-aligned double word fetch buffer Douglas J. Rhodes, Mark E. Thierbach 2000-09-05
6073228 Modulo address generator for generating an updated address Carl R. Holmqvist, Douglas J. Rhodes, Mark E. Thierbach 2000-06-06
6029267 Single-cycle, soft decision, compare-select operation using dual-add processor Sivanand Simanapalli 2000-02-22
6009128 Metric acceleration on dual MAC processor Mohammad S. Mobin, Sivanand Simanapalli 1999-12-28
5889689 Hierarchical carry-select, three-input saturation Mazhar M. Alidina 1999-03-30
4967388 Truncated product partial canonical signed digit multiplier 1990-10-30