Issued Patents All Time
Showing 26–50 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6885233 | Altering operating frequency and voltage set point of a circuit in response to the operating temperature and instantaneous operating voltage of the circuit | Douglas Huard, Edward A. Burton | 2005-04-26 |
| 6876717 | Multi-stage programmable Johnson counter | Feng Wang | 2005-04-05 |
| 6842056 | Cascaded phase-locked loops | Cangsang Zhao, Chee How Lim | 2005-01-11 |
| 6809606 | Voltage ID based frequency control for clock generating circuit | Hong-Piao Ma, Greg Taylor, Chee How Lim, Robert Greiner, Edward A. Burton +1 more | 2004-10-26 |
| 6778033 | Voltage control for clock generating circuit | Hong-Piao Ma, Greg Taylor | 2004-08-17 |
| 6771134 | Frequency control for clock generating circuit | Hong-Piao Ma, Greg Taylor, Chee How Lim, Edward A. Burton | 2004-08-03 |
| 6748549 | Clocking an I/O buffer, having a selectable phase difference from the system clock, to and from a remote I/O buffer clocked in phase with the system clock | Chi-Yeu Chao, Chee How Lim, Songmin Kim, Gregory F. Taylor | 2004-06-08 |
| D483742 | Remote controller holder | — | 2003-12-16 |
| 6614317 | Variable lock window for a phase locked loop | Usman Mughal, Masud Kamal, Chee How Lim, Kent R. Callahan | 2003-09-02 |
| D478899 | Remote controller holder | — | 2003-08-26 |
| D478900 | Remote controller holder | — | 2003-08-26 |
| 6587800 | Reference timer for frequency measurement in a microprocessor | Douglas R. Parker | 2003-07-01 |
| 6531974 | Controlling time delay | Kent R. Callahan | 2003-03-11 |
| 6469533 | Measuring a characteristic of an integrated circuit | Nasser A. Kurd, Rachael Parker, Hung-Piao Ma | 2002-10-22 |
| 6407600 | Method and apparatus for providing a start-up control voltage | Yi-Jen Lu, Ian A. Young, Douglas R. Parker | 2002-06-18 |
| 6407591 | Self-configurable clock input buffer compatible with high-voltage single-ended and low-voltage differential clock signals | Hung-Piao Ma, Songmin Kim, Chi-Yeu Chao | 2002-06-18 |
| 6320424 | Method of providing and circuit for providing phase lock loop frequency overshoot control | Nasser A. Kurd, Yi-Jen Lu | 2001-11-20 |
| 6298105 | Method and apparatus for a low skew, low standby power clock network | Xia Dai, George Geannopuolos, John T. Orton, Greg Taylor | 2001-10-02 |
| 6265925 | Multi-stage techniques for accurate shutoff of circuit | Hung-Piao Ma | 2001-07-24 |
| 6211740 | Switching a clocked device from an initial frequency to a target frequency | Xia Dai | 2001-04-03 |
| 6208169 | Internal clock jitter detector | Gregory F. Taylor, Ravishankar Kuppuswamy, Douglas R. Parker, Hung-Piao Ma, Kent R. Callahan +1 more | 2001-03-27 |
| 6075832 | Method and apparatus for deskewing clock signals | George L. Geannopoulos, Greg Taylor, Xia Dai | 2000-06-13 |
| 6047383 | Multiple internal phase-locked loops for synchronization of chipset components and subsystems operating at different frequencies | Keith Self, Jeffrey E. Smith | 2000-04-04 |
| 5801561 | Power-on initializing circuit | Gregory F. Taylor, Roshan Fernando, Jeffrey E. Smith | 1998-09-01 |
| 5742190 | Method and apparatus for clocking latches in a system having both pulse latches and two-phase latches | Jashojiban Banik | 1998-04-21 |