Issued Patents All Time
Showing 76–100 of 109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7586322 | Test structure and method for measuring mismatch and well proximity effects | Yanzhong Xu | 2009-09-08 |
| 7561407 | Multi-segment capacitor | Shuxian Chen | 2009-07-14 |
| 7511932 | ESD protection structure | Antonio Gallerano, Srinivas Perisetty, Cheng-Hsiung Huang | 2009-03-31 |
| 7471500 | Multi-segment parallel wire capacitor | Shuxian Chen | 2008-12-30 |
| 7465971 | Integrated circuit structures for increasing resistance to single event upset | Lakhbeer S. Sidhu, Irfan Rahim, John E. Turner | 2008-12-16 |
| 7463057 | Integrated circuits with adjustable memory element power supplies | Irfan Rahim, Yowjuang (Bill) Liu | 2008-12-09 |
| 7400167 | Apparatus and methods for optimizing the performance of programmable logic devices | David Lewis, Vaughn Betz, Paul Leventis, Christopher F. Lane, Andy L. Lee +1 more | 2008-07-15 |
| 7388772 | Latch circuit | Yanzhong Xu | 2008-06-17 |
| 7361961 | Method and apparatus with varying gate oxide thickness | Irfan Rahim, Yow-Juang Liu | 2008-04-22 |
| 7355453 | Techniques for trimming drive current in output drivers | — | 2008-04-08 |
| 7352610 | Volatile memory elements with soft error upset immunity for programmable logic device integrated circuits | Bruce B. Pedersen, Irfan Rahim | 2008-04-01 |
| 7321236 | Apparatus and methods for programmable logic devices with improved performance characteristics | Irfan Rahim | 2008-01-22 |
| 7319253 | Integrated circuit structures for increasing resistance to single event upset | Lakhbeer S. Sidhu, Irfan Rahim, John E. Turner | 2008-01-15 |
| 7276746 | Metal-oxide-semiconductor varactors | Yanzhong Xu | 2007-10-02 |
| 7183800 | Apparatus and methods for programmable logic devices with improved performance characteristics | Irfan Rahim | 2007-02-27 |
| 7142009 | Adaptive power supply voltage regulation for programmable logic | Irfan Rahim | 2006-11-28 |
| 7098717 | Gate triggered ESD clamp | — | 2006-08-29 |
| 6921948 | Adjustment of threshold voltages of selected NMOS and PMOS transistors using fewer masking steps | — | 2005-07-26 |
| 6881634 | Buried-channel transistor with reduced leakage current | — | 2005-04-19 |
| 6833330 | Method to eliminate inverse narrow width effect in small geometry MOS transistors | Kedar Patel | 2004-12-21 |
| 6667224 | Method to eliminate inverse narrow width effect in small geometry MOS transistors | Kedar Patel | 2003-12-23 |
| 6586296 | Method of doping wells, channels, and gates of dual gate CMOS technology with reduced number of masks | — | 2003-07-01 |
| 6562675 | Adjustment of threshold voltages of selected NMOS and PMOS transistors using fewer masking steps | — | 2003-05-13 |
| 6537893 | Substrate isolated transistor | — | 2003-03-25 |
| 6492710 | Substrate isolated transistor | — | 2002-12-10 |