Issued Patents All Time
Showing 26–47 of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9158619 | On chip redundancy repair for memory devices | Darshan Kobla, Vimal Natarajan | 2015-10-13 |
| 9136021 | Self-repair logic for stacked memory architecture | Joon-Sung Yang, Darshan Kobla, Liwei Ju | 2015-09-15 |
| 9110134 | Input/output delay testing for devices utilizing on-chip delay generation | Tak M. Mak, Christopher J. Nelson, Derek B. Feltham | 2015-08-18 |
| 9064560 | Interface for storage device access over memory bus | Shekoufeh Qawami, Rajesh Sundaram, Robert W. Faber | 2015-06-23 |
| 9036718 | Low speed access to DRAM | Michael W. Williams | 2015-05-19 |
| 8909849 | Pipeline architecture for scalable performance on memory | Rajesh Sundaram, Derchang Kau | 2014-12-09 |
| 8862973 | Method and system for error management in a memory device | Kuljit S. Bains, Dennis W. Brzezinski, Michael W. Williams, John B. Halbert | 2014-10-14 |
| 8843794 | Method, system and apparatus for evaluation of input/output buffer circuitry | Christopher J. Nelson, Tak M. Mak, Pete D. Vogt | 2014-09-23 |
| 8838935 | Apparatus, method, and system for implementing micro page tables | Glenn Hinton, Madhavan Parthasarathy, Rajesh S. Parthasarathy, Muthukumar P. Swaminathan, Raj K. Ramanujan +5 more | 2014-09-16 |
| 8645777 | Boundary scan chain for stacked memory | — | 2014-02-04 |
| 8619883 | Low speed access to DRAM | Michael W. Williams | 2013-12-31 |
| 8607089 | Interface for storage device access over memory bus | Shekoufeh Qawami, Rajesh Sundaram, Robert W. Faber | 2013-12-10 |
| 7644250 | Defining pin functionality at device power on | Jun Shi, Aaron Martin | 2010-01-05 |
| 7580465 | Low speed access to DRAM | Michael W. Williams | 2009-08-25 |
| 7536267 | Built-in self test for memory interconnect testing | Jay Nejedlo | 2009-05-19 |
| 7533204 | Enumeration of devices on a memory channel | Jun Shi | 2009-05-12 |
| 7519891 | IO self test method and apparatus for memory | — | 2009-04-14 |
| 7412627 | Method and apparatus for providing debug functionality in a buffered memory channel | Kuljit S. Bains, Robert M. Ellis, Chris Freeman, John B. Halbert | 2008-08-12 |
| 7321997 | Memory channel self test | Edward Weaver, Ramasubramanian Rajamani | 2008-01-22 |
| 7177211 | Memory channel test fixture and method | — | 2007-02-13 |
| 6996749 | Method and apparatus for providing debug functionality in a buffered memory channel | Kuljit S. Bains, Robert M. Ellis, Chris Freeman, John B. Halbert | 2006-02-07 |
| 5929448 | Redundant transistor dose monitor circuit using two ICs | — | 1999-07-27 |