CH

Christopher J. Hughes

IN Intel: 188 patents #66 of 30,777Top 1%
TP Thorn Emi Plc: 1 patents #52 of 135Top 40%
🗺 California: #622 of 386,348 inventorsTop 1%
Overall (All Time): #3,780 of 4,157,543Top 1%
189
Patents All Time

Issued Patents All Time

Showing 26–50 of 189 patents

Patent #TitleCo-InventorsDate
11954490 Systems and methods for performing instructions to transform matrices into row-interleaved format Raanan Sade, Robert Valentine, Bret L. Toll, Alexander Heinecke, Elmoustapha Ould-Ahmed-Vall +1 more 2024-04-09
11941534 Genome sequence alignment system and method Gurpreet Singh Kalsi, Anant Vithal Nori, Sreenivas Subramoney, Damla Senol 2024-03-26
11941395 Apparatuses, methods, and systems for instructions for 16-bit floating-point matrix dot product instructions Alexander Heinecke, Robert Valentine, Mark J. Charney, Menachem Adelman, Evangelos Georganas +3 more 2024-03-26
11941394 Data element rearrangement, processors, methods, systems, and instructions Jong Soo Park 2024-03-26
11934830 Method and apparatus for data-ready memory operations William M. Brown, Mikhail Plotnikov 2024-03-19
11892952 No-locality hint vector memory access processors, methods, systems, and instructions 2024-02-06
11886875 Systems and methods for performing nibble-sized operations on matrix elements Elmoustapha Ould-Ahmed-Vall, Jonathan Pearce, Dan Baum, Guei-Yuan Lueh, Michael Espig +4 more 2024-01-30
11847185 Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements Dan Baum, Chen Koren, Elmoustapha Ould-Ahmed-Vall, Michael Espig, Raanan Sade +3 more 2023-12-19
11748103 Systems and methods for performing matrix compress and decompress instructions Dan Baum, Michael Espig, James D. Guilford, Wajdi K. Feghali, Raanan Sade +7 more 2023-09-05
11726793 Data locality enhancement for graphics processing units Prasoonkumar Surti, Guei-Yuan Lueh, Adam T. Lake, Jill MacDonald Boyce, Subramaniam Maiyuran +6 more 2023-08-15
11714648 Systems for performing instructions to quickly convert and use tiles as 1D vectors Bret L. Toll, Dan Baum, Elmoustapha Ould-Ahmed-Vall, Raanan Sade, Robert Valentine +2 more 2023-08-01
11675590 Systems and methods for performing instructions to transform matrices into row-interleaved format Raanan Sade, Robert Valentine, Bret L. Toll, Alexander Heinecke, Elmoustapha Ould-Ahmed-Vall +1 more 2023-06-13
11599362 Coalescing adjacent gather/scatter operations Andrew T. Forsyth, Brian J. Hickmann, Jonathan C. Hall 2023-03-07
11579883 Systems and methods for performing horizontal tile operations Bret L. Toll, Dan Baum, Elmoustapha Ould-Ahmed-Vall, Raanan Sade, Robert Valentine +2 more 2023-02-14
11579880 Systems for performing instructions to quickly convert and use tiles as 1D vectors Bret L. Toll, Dan Baum, Elmoustapha Ould-Ahmed-Vall, Raanan Sade, Robert Valentine +2 more 2023-02-14
11537520 Remote atomic operations in multi-socket systems Doddaballapur N. Jayasimha, Samantika S. Sury, Jonas Svennebring, Yen-Cheng Liu, Stephen R. Van Doren +1 more 2022-12-27
11513957 Processor and method implementing a cacheline demote machine instruction Ren Wang, Andrew J. Herdrich, Yen-Cheng Liu, Herbert Hum, Jong Soo Park +10 more 2022-11-29
11507376 Systems for performing instructions for fast element unpacking into 2-dimensional registers Bret L. Toll, Alexander Heinecke, Ronen Zohar, Michael Espig, Dan Baum +4 more 2022-11-22
11500636 Spatial and temporal merging of remote atomic operations Joseph Nuzman, Jonas Svennebring, Doddaballapur N. Jayasimha, Samantika S. Sury, David A. Koufaty +4 more 2022-11-15
11436010 Method and apparatus for vectorizing indirect update loops Mikhail Plotnikov, Andrey Naraikin 2022-09-06
11422809 Apparatus and method for multicasting a cache line update using delayed refetch messages Dan Baum 2022-08-23
11416260 Systems and methods for implementing chained tile operations Alexander Heinecke, Robert Valentine, Bret L. Toll, Jesus Corbal, Elmoustapha Ould-Ahmed-Vall 2022-08-16
11403071 Systems and methods for performing instructions to transpose rectangular tiles Raanan Sade, Robert Valentine, Mark J. Charney, Simon Rubanovich, Amit Gradstein +5 more 2022-08-02
11392500 No-locality hint vector memory access processors, methods, systems, and instructions 2022-07-19
11392381 Systems and methods for performing instructions to transform matrices into row-interleaved format Raanan Sade, Robert Valentine, Bret L. Toll, Alexander Heinecke, Elmoustapha Ould-Ahmed-Vall +1 more 2022-07-19