Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12197368 | Component firmware interaction using hardware registers | Kevan A. Lillie, Shlomi Lalush, Yaakov Dalsace, Adee O. Ran, David Golodni +2 more | 2025-01-14 |
| 11809353 | Component firmware interaction using hardware registers | Kevan A. Lillie, Shlomi Lalush, Yaakov Dalsace, Adee O. Ran, David Golodni +2 more | 2023-11-07 |
| 11805042 | Technologies for timestamping with error correction | Yoni Landau, Janardhan H. Satyanarayana, Mark A. Bordogna | 2023-10-31 |
| 11546241 | Technologies for timestamping with error correction | Yoni Landau, Janardhan H. Satyanarayana, Mark A. Bordogna | 2023-01-03 |
| 11190208 | Techniques for link partner error reporting | Adee O. Ran, Amir Mezer, Alon Meisler, Itamar Levin, Yoni Landau | 2021-11-30 |
| 11153191 | Technologies for timestamping with error correction | Yoni Landau, Janardhan H. Satyanarayana, Mark A. Bordogna | 2021-10-19 |
| 10924132 | Techniques for link partner error reporting | Adee O. Ran, Amir Mezer, Alon Meisler, Itamar Levin, Yoni Landau | 2021-02-16 |
| 10122209 | Tunable delay control of a power delivery network | Ahmed Salama, Srikrishnan Venkataraman, Todd W. Mellinger, Michael J. Hill, Paul K. Tucker | 2018-11-06 |
| 9722717 | Technologies for ethernet link robustness for deep sleep low power applications | Yoni Landau, Adee O. Ran | 2017-08-01 |
| 8711018 | Providing a feedback loop in a low latency serial interconnect architecture | Ehud Shoor, Dror Lazar | 2014-04-29 |
| 8405533 | Providing a feedback loop in a low latency serial interconnect architecture | Ehud Shoor, Dror Lazar | 2013-03-26 |
| 8175823 | Probing analog signals | Amir Mezer | 2012-05-08 |
| 8130939 | Maintaining convergence of a receiver during changing conditions | Amir Mezer, Adee O. Ran, Ehud Shoor, Harry Birenboim, Yaniv Hadar | 2012-03-06 |