Issued Patents All Time
Showing 126–150 of 173 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8440558 | Semiconductor device and method of fabricating the same | Huilong Zhu, Zhijiong Luo | 2013-05-14 |
| 8426282 | Method for forming semiconductor substrate isolation | Zhijiong Luo, Huilong Zhu | 2013-04-23 |
| 8426920 | MOSFET and method for manufacturing the same | Huilong Zhu, Qingqing Liang, Zhijiong Luo | 2013-04-23 |
| 8420490 | High-performance semiconductor device and method of manufacturing the same | Huilong Zhu, Zhijiong Luo | 2013-04-16 |
| 8420489 | High-performance semiconductor device and method of manufacturing the same | Huilong Zhu, Zhijiong Luo | 2013-04-16 |
| 8415621 | Method for line width measurement | Huilong Zhu, Zhijiong Luo | 2013-04-09 |
| 8410544 | finFETs and methods of making same | Kevin K. Chan, Thomas S. Kanarsky, Jinghong Li, Christine Qiqing Ouyang, Dae-Gyu Park +2 more | 2013-04-02 |
| 8409941 | Semiconductor device and method for manufacturing the same | Huilong Zhu, Zhijiong Luo | 2013-04-02 |
| 8399328 | Transistor and method for forming the same | Zhijong Luo, Huilong Zhu | 2013-03-19 |
| 8399315 | Semiconductor structure and method for manufacturing the same | Zhijiong Luo, Huilong Zhu | 2013-03-19 |
| 8377777 | Semiconductor device and method of fabricating the same | Zhijiong Luo, Huilong Zhu | 2013-02-19 |
| 8367490 | Semiconductor structure and method for manufacturing the same | Huilong Zhu, Qingqing Liang, Zhijiong Luo | 2013-02-05 |
| 8361851 | Method for manufacturing an NMOS with improved carrier mobility | Huilong Zhu, Zhijiong Luo | 2013-01-29 |
| 8354343 | Semiconductor structure and manufacturing method of the same | Huilong Zhu, Zhijiong Luo | 2013-01-15 |
| 8343818 | Method for forming retrograded well for MOSFET | Huilong Zhu, Zhijiong Luo, Qingqing Liang | 2013-01-01 |
| 8288222 | Application of cluster beam implantation for fabricating threshold voltage adjusted FETs | Oleg Gluschenkov, Dae-Gyu Park | 2012-10-16 |
| 8269307 | Shallow trench isolation structure and method for forming the same | Huicai Zhong, Qingqing Liang, Huilong Zhu | 2012-09-18 |
| 8236636 | Hybrid orientation semiconductor structure with reduced boundary defects and method of forming same | John A. Ott, Katherine L. Saenger, Chun-Yung Sung | 2012-08-07 |
| 8232178 | Method for forming a semiconductor device with stressed trench isolation | Zhijiong Luo, Huilong Zhu | 2012-07-31 |
| 8198673 | Asymmetric epitaxy and application thereof | Xinhui Wang, Kevin K. Chan, Zhibin Ren | 2012-06-12 |
| 8169026 | Stress-induced CMOS device | Zhijiong Luo, Qingqing Liang, Huilong Zhu | 2012-05-01 |
| 8138029 | Structure and method having asymmetrical junction or reverse halo profile for semiconductor on insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) | Huilong Zhu, Zhijiong Luo, Qingqing Liang | 2012-03-20 |
| 8105887 | Inducing stress in CMOS device | Zhijiong Luo, Qingqing Liang, Huilong Zhu | 2012-01-31 |
| 8106462 | Balancing NFET and PFET performance using straining layers | Xiangdong Chen, Weipeng Li, Anda C. Mocuta, Dae-Gyu Park, Melanie J. Sherony +8 more | 2012-01-31 |
| 8043920 | finFETS and methods of making same | Kevin K. Chan, Thomas S. Kanarsky, Jinghong Li, Christine Qiqing Ouyang, Dae-Gyu Park +2 more | 2011-10-25 |