JK

Jeng-Dar Ko

IT ITRI: 4 patents #1,876 of 9,619Top 20%
IN Invensas: 4 patents #60 of 142Top 45%
📍 Dapi, TW: #1 of 1 inventorsTop 100%
Overall (All Time): #642,429 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
9601474 Electrically stackable semiconductor wafer and chip packages Shou-Lung Chen, Ching-Wen Hsaio, Yu-Hua Chen, Chih-Ming Tzeng, Jyh-Rong Lin +1 more 2017-03-21
9059181 Wafer leveled chip packaging structure and method thereof Shou-Lung Chen, Ching-Wen Hsaio, Yu-Hua Chen, Chih-Ming Tzeng, Jyh-Rong Lin +1 more 2015-06-16
8587091 Wafer-leveled chip packaging structure and method thereof Shou-Lung Chen, Ching-Wen Hsiao, Yu-Hua Chen, Chih-Ming Tzeng, Jyh-Rong Lin +1 more 2013-11-19
8314482 Semiconductor package device Shou-Lung Chen, Ching-Wen Hsiao, Yu-Hua Chen, Chih-Ming Tzeng, Jyh-Rong Lin +1 more 2012-11-20
7838333 Electronic device package and method of manufacturing the same Shou-Lung Chen, Ching-Wen Hsiao, Yu-Hua Chen, Jyh-Rong Lin 2010-11-23
7632707 Electronic device package and method of manufacturing the same Shou-Lung Chen, Ching-Wen Hsiao, Yu-Hua Chen, Jyh-Rong Lin 2009-12-15
7528009 Wafer-leveled chip packaging structure and method thereof Shou-Lung Chen, Ching-Wen Hsiao, Yu-Hua Chen, Chih-Ming Tzeng, Jyh-Rong Lin +1 more 2009-05-05
7294920 Wafer-leveled chip packaging structure and method thereof Shou-Lung Chen, Ching-Wen Hsiao, Yu-Hua Chen, Chih-Ming Tzeng, Jyh-Rong Lin +1 more 2007-11-13