Issued Patents All Time
Showing 76–93 of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6461877 | Variable data compensation for vias or contacts | Karen L. Holloway, Kurt A. Tallman | 2002-10-08 |
| 6341083 | CMOS SRAM cell with PFET passgate devices | — | 2002-01-22 |
| 6256755 | Apparatus and method for detecting defective NVRAM cells | Terence B. Hook, Chung H. Lam, Eric Lee, James S. Nakos, Nivo Rovedo +1 more | 2001-07-03 |
| 5681770 | Process for making and programming a flash memory array | Seiki Ogura, Nivo Rovedo | 1997-10-28 |
| 5672892 | Process for making and programming a flash memory array | Seiki Ogura, Nivo Rovedo | 1997-09-30 |
| 5666320 | Storage system | Taqi Nasser Buti, Seiki Ogura | 1997-09-09 |
| 5661684 | Differential sense amplifier | Taqi Nasser Buti, Seiki Ogura | 1997-08-26 |
| 5654917 | Process for making and programming a flash memory array | Seiki Ogura, Nivo Rovedo | 1997-08-05 |
| 5541130 | Process for making and programming a flash memory array | Seiki Ogura, Nivo Rovedo | 1996-07-30 |
| 5365117 | Logic gates having fast logic signal paths through switchable capacitors | — | 1994-11-15 |
| 5297089 | Balanced bit line pull up circuitry for random access memories | — | 1994-03-22 |
| 5276638 | Bipolar memory cell with isolated PNP load | — | 1994-01-04 |
| 5255240 | One stage word line decoder/driver with speed-up Darlington drive and adjustable pull down | — | 1993-10-19 |
| 5210447 | Word decoder with SBD-T.sub.x clamp | — | 1993-05-11 |
| 5124573 | Adjustable clock chopper/expander circuit | — | 1992-06-23 |
| 5120987 | Tunable timer for memory arrays | — | 1992-06-09 |
| 4922455 | Memory cell with active device for saturation capacitance discharge prior to writing | William Chin, Rudolph D. Dussault, Ronald W. Knepper, Friedrich-Christian Wernicke | 1990-05-01 |
| 4813017 | Semiconductor memory device and array | — | 1989-03-14 |