PV

Peter Verwegen

IBM: 5 patents #18,733 of 70,183Top 30%
Overall (All Time): #989,349 of 4,157,543Top 25%
5
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9536030 Optimization of integrated circuit physical design Niels Fricke, Karsten Muuss, Christoph Wandel 2017-01-03
7560964 Latch and clock structures for enabling race-reduced MUX scan and LSSD co-compatibility David E. Lackey, Steven F. Oakland 2009-07-14
7482851 Latch and clock structures for enabling race-reduced mux scan and LSSD co-compatibility David E. Lackey, Steven F. Oakland 2009-01-27
7401278 Edge-triggered master + LSSD slave binary latch 2008-07-15
6147546 Zero volt/zero current fuse arrangement 2000-11-14