MT

Mervyn Y. Tan

IBM: 13 patents #8,581 of 70,183Top 15%
Google: 3 patents #8,000 of 22,993Top 35%
Overall (All Time): #292,929 of 4,157,543Top 8%
16
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11354358 Organization and retrieval of conditioned data 2022-06-07
10303719 Organization and retrieval of conditioned data 2019-05-28
9888347 Resolving location criteria using user location data 2018-02-06
7818694 IC layout optimization to improve yield Robert J. Allen, Faye D. Baker, Albert M. Chu, Michael S. Gray, Jason D. Hibbeler +2 more 2010-10-19
7810060 Critical area computation of composite fault mechanisms using Voronoi diagrams Robert J. Allen, Evanthia Papadopoulou 2010-10-05
7752589 Method, apparatus, and computer program product for displaying and modifying the critical area of an integrated circuit design Robert J. Allen, Sarah C. Braasch, Matthew T. Guzowski, Jason D. Hibbeler, Daniel N. Maynard +3 more 2010-07-06
7685553 System and method for global circuit routing incorporating estimation of critical area estimate metrics Evanthia Papadopoulou, Ruchir Puri, Louise H. Trevillyan, Hua Xiang 2010-03-23
7661080 Method and apparatus for net-aware critical area extraction Evanthia Papadopoulou, Sarah C. Braasch 2010-02-09
7634745 Method for computing the critical area of compound fault mechanisms Robert J. Allen, Sarah C. Braasch 2009-12-15
7503020 IC layout optimization to improve yield Robert J. Allen, Faye D. Baker, Albert M. Chu, Michael S. Gray, Jason D. Hibbeler +2 more 2009-03-10
7404159 Critical area computation of composite fault mechanisms using Voronoi diagrams Robert J. Allen, Evanthia Papadopoulou 2008-07-22
7310788 Sample probability of fault function determination using critical defect size map Robert J. Allen 2007-12-18
7302653 Probability of fault function determination using critical defect size map Robert J. Allen 2007-11-27
7260790 Integrated circuit yield enhancement using Voronoi diagrams Robert J. Allen, Michael S. Gray, Jason D. Hibbeler, Robert F. Walker 2007-08-21
7240306 Integrated circuit layout critical area determination using Voronoi diagrams and shape biasing Robert J. Allen, Peter Chan, Evanthia Papadopoulou, Sarah C. Prue 2007-07-03
7143371 Critical area computation of composite fault mechanisms using voronoi diagrams Robert J. Allen, Evanthia Papadopoulou 2006-11-28