Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9405315 | Delayed execution of program code on multiple processors | Mark S. Fredrickson, Scott D. Frei, Steven P. Jones, Chad B. McBride | 2016-08-02 |
| 9146835 | Methods and systems with delayed execution of multiple processors | Mark S. Fredrickson, Scott D. Frei, Steven P. Jones, Chad B. McBride | 2015-09-29 |
| 8219745 | Memory controller to utilize DRAM write buffers | Kent Harold Haselhorst, Ryan Abel Heakendorf, Paul Allen Ganfield, Tolga Ozguner | 2012-07-10 |
| 7925823 | Reuse of functional data buffers for pattern buffers in XDR DRAM | Kent Harold Haselhorst, Paul Allen Ganfield, Tolga Ozguner | 2011-04-12 |
| 7840744 | Rank select operation between an XIO interface and a double data rate interface | Kent Harold Haselhorst, John D. Irish, David Alan Norgaard | 2010-11-23 |
| 7761682 | Memory controller operating in a system with a variable system clock | Melissa Ann Barnum, Paul Allen Ganfield, Lonny Lambrecht, Tolga Ozguner | 2010-07-20 |
| 7757040 | Memory command and address conversion between an XDR interface and a double data rate interface | John D. Irish, David Alan Norgaard, Tolga Ozguner | 2010-07-13 |
| 7752379 | Managing write-to-read turnarounds in an early read after write memory system | Paul Allen Ganfield, Kent Harold Haselhorst, Ryan Abel Heckendorf, Tolga Ozguner | 2010-07-06 |
| 7669028 | Optimizing data bandwidth across a variable asynchronous clock domain | Brian M. McKevett, Tolga Ozguner | 2010-02-23 |
| 7660246 | Method and apparatus for scaling input bandwidth for bandwidth allocation technology | — | 2010-02-09 |
| 7631154 | Handling of the transmit enable signal in a dynamic random access memory controller | — | 2009-12-08 |
| 7613873 | Deferring refreshes during calibrations in memory systems | Ryan Abel Heckendorf | 2009-11-03 |
| 7558908 | Structure of sequencers that perform initial and periodic calibrations in a memory system | Ryan Abel Heckendorf | 2009-07-07 |
| 7490204 | Using constraints to simplify a memory controller | Ryan Abel Heckendorf | 2009-02-10 |
| 7487318 | Managing write-to-read turnarounds in an early read after write memory system | Paul Allen Ganfield, Kent Harold Haselhorst, Ryan Abel Heckendorf, Tolga Ozguner | 2009-02-03 |
| 7467277 | Memory controller operating in a system with a variable system clock | Melissa Ann Barnum, Paul Allen Ganfield, Lonny Lambrecht, Tolga Ozguner | 2008-12-16 |
| 7380083 | Memory controller capable of locating an open command cycle to issue a precharge packet | Ryan Abel Heckendorf | 2008-05-27 |
| 7380052 | Reuse of functional data buffers for pattern buffers in XDR DRAM | Kent Harold Haselhorst, Paul Allen Ganfield, Tolga Ozguner | 2008-05-27 |
| 7356642 | Deferring refreshes during calibrations in memory systems | Ryan Abel Heckendorf | 2008-04-08 |
| 7321961 | Method and apparatus to avoid collisions between row activate and column read or column write commands | Ryan Abel Heckendorf | 2008-01-22 |
| 7321950 | Method and apparatus for managing write-to-read turnarounds in an early read after write memory system | Paul Allen Ganfield, Kent Harold Haselhorst, Ryan Abel Heckendorf, Tolga Ozguner | 2008-01-22 |
| 7305517 | Structure of sequencers that perform initial and periodic calibrations in a memory system | Ryan Abel Heckendorf | 2007-12-04 |
| 7283562 | Method and apparatus for scaling input bandwidth for bandwidth allocation technology | — | 2007-10-16 |
| 7275137 | Handling of the transmit enable signal in a dynamic random access memory controller | — | 2007-09-25 |
| 7206284 | Method and apparatus for automatic congestion avoidance for differentiated service flows | — | 2007-04-17 |