Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory command and address conversion between an XDR interface and a double data rate interface

Memory command and address conversion between an XDR interface and a double data rate interface

US Patent 7757040 · Granted Jul 13, 2010

Estimated economic value: $6,420,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Translation invalidation in a translation cache serving an accelerator2021
Integrated circuit and data processing system supporting address aliasing in an 2021
Integrated circuit and data processing system supporting attachment of a real ad2020
Integrated circuit and data processing system having a configurable cache direct2020
No miss cache structure for real-time image transformations with multiple LSR pr2020
Accelerator memory coherency with single state machine2020
Techniques for faster loading of data for accelerators2020
Selectively applying reprojection processing to multi-layer scenes for optimizin2019
Selective application of reprojection processing on layer sub-regions for optimi2019
Methods and systems for multistage post-rendering image transformation2019
Post-rendering image transformation using parallel image transformation pipeline2019
Reducing negative effects of insufficient data throughput for real-time processi2019