Issued Patents All Time
Showing 26–50 of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10169186 | Efficient testing of direct memory address translation | Shakti Kapoor, Nelson Wu | 2019-01-01 |
| 10169185 | Efficient testing of direct memory address translation | Shakti Kapoor, Nelson Wu | 2019-01-01 |
| 10169181 | Efficient validation of transactional memory in a computer processor | Vinod Bussa, Shakti Kapoor | 2019-01-01 |
| 10055320 | Replicating test case data into a cache and cache inhibited memory | Shakti Kapoor | 2018-08-21 |
| 10007568 | Testing a non-core MMU | Shakti Kapoor, Paul Frank Lecocq, John A. Schumann | 2018-06-26 |
| 9959183 | Replicating test case data into a cache with non-naturally aligned data boundaries | Shakti Kapoor | 2018-05-01 |
| 9959182 | Replicating test case data into a cache with non-naturally aligned data boundaries | Shakti Kapoor | 2018-05-01 |
| 9940226 | Synchronization of hardware agents in a computer system | Shakti Kapoor | 2018-04-10 |
| 9921897 | Testing a non-core MMU | Shakti Kapoor, Paul Frank Lecocq, John A. Schumann | 2018-03-20 |
| 9910941 | Test case generation | Madhusudan Kadiyala, John Paul | 2018-03-06 |
| 9892060 | Identifying stale entries in address translation cache | Vinod Bussa, Shakti Kapoor | 2018-02-13 |
| 9720845 | Identifying stale entries in address translation cache | Vinod Bussa, Shakti Kapoor | 2017-08-01 |
| 9697138 | Identifying stale entries in address translation cache | Vinod Bussa, Shakti Kapoor | 2017-07-04 |
| 9612929 | Efficient validation/verification of coherency and snoop filtering mechanisms in computing systems | Shakti Kapoor | 2017-04-04 |
| 9594680 | Identifying stale entries in address translation cache | Vinod Bussa, Shakti Kapoor | 2017-03-14 |
| 9594672 | Test case generation | Madhusudan Kadiyala, John Paul | 2017-03-14 |
| 9542290 | Replicating test case data into a cache with non-naturally aligned data boundaries | Shakti Kapoor | 2017-01-10 |
| 9514036 | Test case generation | Madhusudan Kadiyala, John Paul | 2016-12-06 |
| 9501408 | Efficient validation of coherency between processor cores and accelerators in computer systems | Sairam Kamaraju, Shakti Kapoor | 2016-11-22 |
| 9424159 | Performance measurement of hardware accelerators | Sairam Kamaraju, Anil Krishna | 2016-08-23 |
| 9298516 | Verification of dynamic logical partitioning | Varun Mallikarjunan | 2016-03-29 |
| 9286133 | Verification of dynamic logical partitioning | Varun Mallikarjunan | 2016-03-15 |
| 9287005 | Detecting missing write to cache/memory operations | Bhavesh D. Budhabhatti, Sairam Kamaraju, Varun Mallikarjunan, Subrat K. Panda | 2016-03-15 |
| 9128887 | Using a buffer to replace failed memory cells in a memory component | Prasanna Jayaraman, Anil B. Lingambudi, Girisankar Paulraj, Saravanan Sethuraman, Diyanesh Babu C. Vidyapoornachary | 2015-09-08 |
| 9043569 | Memory data management | Timothy J. Dell, Prasanna Jayaraman, Anil B. Lingambudi | 2015-05-26 |