Issued Patents All Time
Showing 25 most recent of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9971713 | Multi-petascale highly efficient parallel supercomputer | Sameh W. Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle +54 more | 2018-05-15 |
| 9081501 | Multi-petascale highly efficient parallel supercomputer | Sameh W. Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle +55 more | 2015-07-14 |
| 8954684 | Translation table and method for compressed data | Bulent Abali, Michael Mi Tsao, Steven Wheeler | 2015-02-10 |
| 8954683 | Translation table and method for compressed data | Bulent Abali, Michael Mi Tsao, Steven Wheeler | 2015-02-10 |
| 8909897 | Method for generating a delta for compressed data | Bulent Abali | 2014-12-09 |
| 8904147 | Method for generating a delta for compressed data | Bulent Abali | 2014-12-02 |
| RE44342 | Bus architecture employing varying width uni-directional command bus | Robert Allen Drehmel, Kent Harold Haselhorst, Russel Dean Hoover | 2013-07-02 |
| 8108738 | Data eye monitor method and apparatus | Alan Gara, Martin Ohmacht | 2012-01-31 |
| 8010875 | Error correcting code with chip kill capability and power saving enhancement | Alan Gara, Dong Chen, Paul W. Coteus, William T. Flynn, Todd E. Takken +2 more | 2011-08-30 |
| 7873773 | Multi-node architecture with daisy chain communication link configurable to operate in unidirectional and bidirectional modes | Gerald K. Bartley, John Michael Borkenhagen, Robert Allen Drehmel | 2011-01-18 |
| 7802158 | Diagnostic interface architecture for memory device | John Michael Borkenhagen, William Paul Hovis, Paul Rudrud | 2010-09-21 |
| 7526692 | Diagnostic interface architecture for memory device | John Michael Borkenhagen, William Paul Hovis, Paul Rudrud | 2009-04-28 |
| 7254663 | Multi-node architecture with daisy chain communication link configurable to operate in unidirectional and bidirectional modes | Gerald K. Bartley, John Michael Borkenhagen, Robert Allen Drehmel | 2007-08-07 |
| 7234017 | Computer system architecture for a processor connected to a high speed bus transceiver | Giora Biran, Matthew Adam Cushing, Robert Allen Drehmel, Allen James Gavin, Mark E. Kautzman +8 more | 2007-06-19 |
| 7010654 | Methods and systems for re-ordering commands to access memory | Herman L. Blackmon, Joseph A. Kirscht, Brian T. Vanderpool | 2006-03-07 |
| 6963516 | Dynamic optimization of latency and bandwidth on DRAM interfaces | Herman L. Blackmon, John Michael Borkenhagen, Joseph A. Kirscht, David A. Shedivy | 2005-11-08 |
| 6940760 | Data strobe gating for source synchronous communications interface | John Michael Borkenhagen, Todd A. Greenfield | 2005-09-06 |
| 6895482 | Reordering and flushing commands in a computer memory subsystem | Herman L. Blackmon, Robert Allen Drehmel, Kent Harold Haselhorst | 2005-05-17 |
| 6760856 | Programmable compensated delay for DDR SDRAM interface using programmable delay loop for reference calibration | John Michael Borkenhagen | 2004-07-06 |
| 6671211 | Data strobe gating for source synchronous communications interface | John Michael Borkenhagen, Todd A. Greenfield | 2003-12-30 |
| 6628662 | Method and system for multilevel arbitration in a non-blocking crossbar switch | Herman L. Blackmon, Robert Allen Drehmel, Kent Harold Haselhorst | 2003-09-30 |
| 6557069 | Processor-memory bus architecture for supporting multiple processors | Robert Allen Drehmel, Kent Harold Haselhorst, Russell D. Hoover, George Wayne Nation | 2003-04-29 |
| 6526469 | Bus architecture employing varying width uni-directional command bus | Robert Allen Drehmel, Kent Harold Haselhorst, Russell D. Hoover | 2003-02-25 |
| 6523080 | Shared bus non-sequential data ordering method and apparatus | Herman L. Blackmon, Robert Allen Drehmel, Lyle Edwin Grosbach, Kent Harold Haselhorst, David J. Krolak +1 more | 2003-02-18 |
| 6513091 | Data routing using status-response signals | Herman L. Blackmon, Robert Allen Drehmel, Kent Harold Haselhorst | 2003-01-28 |