Issued Patents All Time
Showing 101–112 of 112 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8539486 | Transactional block conflict resolution based on the determination of executing threads in parallel or in serial mode | Gheorghe C. Cascaval, Maged M. Michael | 2013-09-17 |
| 8424015 | Transactional memory preemption mechanism | Richard Louis Arndt, Bradly G. Frey, Cathy May | 2013-04-16 |
| 8392694 | System and method for software initiated checkpoint operations | Colin B. Blundell, Gheorghe C. Cascaval, Maged M. Michael | 2013-03-05 |
| 8341352 | Checkpointed tag prefetcher | Jong-Deok Choi | 2012-12-25 |
| 8255626 | Atomic commit predicated on consistency of watches | Colin B. Blundell, Gheorghe C. Cascaval, Maged M. Michael | 2012-08-28 |
| 8131894 | Method and system for a sharing buffer | Rui Hou, Xiaowei Shen, Huayong Wang | 2012-03-06 |
| 8122438 | Computer implemented method and system for accurate, efficient and adaptive calling context profiling | Jong-Deok Choi, Mauricio J. Serrano, Xiaotong Zhuang | 2012-02-21 |
| 7971039 | Conditional memory ordering | Christoph Von Praun | 2011-06-28 |
| 7921260 | Preferred write-mostly data cache replacement policies | Jong-Deok Choi, Mauricio J. Serrano | 2011-04-05 |
| 7818722 | Computer implemented method and system for accurate, efficient and adaptive calling context profiling | Jong-Deok Choi, Mauricio J. Serrano, Xiaotong Zhuang | 2010-10-19 |
| 7793049 | Mechanism for data cache replacement based on region policies | Jong-Deok Choi, Pratak Pattnaik, Mauricio J. Serrano | 2010-09-07 |
| 7516309 | Method and apparatus for conditional memory ordering | Christoph von Praun | 2009-04-07 |