Issued Patents All Time
Showing 76–100 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6127840 | Dynamic line termination clamping circuit | Paul W. Coteus, Daniel M. Dreps | 2000-10-03 |
| 6098176 | Sinusoidal clock signal distribution using resonant transmission lines | Paul W. Coteus, Daniel M. Dreps, Gerard V. Kopcsay, Todd E. Takken | 2000-08-01 |
| 6038254 | Adaptive filtering method and apparatus to compensate for a frequency difference between two clock sources | Joseph M. Hoke, Samir Kirit Patel | 2000-03-14 |
| 6025744 | Glitch free delay line multiplexing technique | Allan Robert Bertolet, Albert M. Chu, Samuel Weinstein | 2000-02-15 |
| 5968137 | Method of testing a protocol converter with the help of an identical converter and deactivating selection means for preventing asymmetry conversion | Don T. Gottstine, Jurgen Hass, Joseph B. Hanley, Thomas H. Hillock, Donald Jung | 1999-10-19 |
| 5870404 | Self-timed circuit having critical path timing detection | John E. Gersbach, Charles J. Masenas, Norman J. Rohrer, Bruce W. Singer | 1999-02-09 |
| 5859881 | Adaptive filtering method and apparatus to compensate for a frequency difference between two clock sources | Joseph M. Hoke, Samir Kirit Patel | 1999-01-12 |
| 5838205 | Variable-speed phase-locked loop system with on-the-fly switching and method therefor | John E. Gersbach, Charles J. Masenas | 1998-11-17 |
| 5832047 | Self timed interface | Robert S. Capowski, Daniel F. Casper, Richard Jordan, William C. Laviola | 1998-11-03 |
| 5825226 | Delay equalization apparatus and method | John E. Gersbach, Ilya I. Novof | 1998-10-20 |
| 5757297 | Method and apparatus for recovering a serial data stream using a local clock | Joseph M. Hoke, Samir Kirit Patel | 1998-05-26 |
| 5757238 | Fast locking variable frequency phase-locked loop | John E. Gersbach, Charles J. Masenas | 1998-05-26 |
| 5739725 | Digitally controlled oscillator circuit | John E. Gersbach, Charles J. Masenas | 1998-04-14 |
| 5724008 | Phase-locked loop with charge distribution | John E. Gersbach, Charles J. Masenas | 1998-03-03 |
| 5694612 | Self-timed interface for a network of computer processors interconnected in parallel | Derrick LeRoy Garmire, Robert S. Capowski, Daniel F. Casper, Christine M. Desnoyers, Marten J. Halma +1 more | 1997-12-02 |
| 5694087 | Anti-latching mechanism for phase lock loops | John E. Gersbach, Masayuki Hayashi, Ilya I. Novof, Charles J. Masenas | 1997-12-02 |
| 5651033 | Inter-system data communication channel comprised of parallel electrical conductors that simulates the performance of a bit serial optical communications link | Thomas A. Gregg, Robert S. Capowski, Daniel F. Casper | 1997-07-22 |
| 5635869 | Current reference circuit | John E. Gersbach, Ilya J. Novof, Edward J. Nowak | 1997-06-03 |
| 5627456 | All FET fully integrated current reference circuit | Ilya I. Novof, John E. Gersbach | 1997-05-06 |
| 5613068 | Method for transferring data between processors on a network by establishing an address space for each processor in each other processor's | Thomas A. Gregg, Robert S. Capowski, Marten J. Halma, Thomas H. Hillock, Robert E. Murray | 1997-03-18 |
| 5598442 | Self-timed parallel inter-system data communication channel | Thomas A. Gregg, Robert S. Capowski, Daniel F. Casper | 1997-01-28 |
| 5577078 | Edge detector | Richard Jordan, Robert S. Capowski, Daniel F. Casper, William C. Laviola, Peter Tomaszewski | 1996-11-19 |
| 5568526 | Self timed interface | Robert S. Capowski, Daniel F. Casper, Richard Jordan, William C. Laviola | 1996-10-22 |
| 5522088 | Shared channel subsystem has a self timed interface using a received clock signal to individually phase align bits received from a parallel bus | Marten J. Halma, Robert S. Capowski, Daniel F. Casper, Martin W. Sachs | 1996-05-28 |
| 5513377 | Input-output element has self timed interface using a received clock signal to individually phase aligned bits received from a parallel bus | Robert S. Capowski, Daniel F. Casper, Frederick J. Cox, Marten J. Halma | 1996-04-30 |