Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6192482 | Self-timed parallel data bus interface to direct storage devices | Daniel F. Casper, James T. Brady, Frederick J. Cox, Frank D. Ferraiolo, Marten J. Halma +1 more | 2001-02-20 |
| 6185693 | Synchronous interface for transmitting data in a system of massively parallel processors | Derrick LeRoy Garmire, Daniel F. Casper, Christine M. Desnoyers, Frank D. Ferraiolo, Marten J. Halma +1 more | 2001-02-06 |
| 5832047 | Self timed interface | Frank D. Ferraiolo, Daniel F. Casper, Richard Jordan, William C. Laviola | 1998-11-03 |
| 5819061 | Method and apparatus for dynamic storage reconfiguration in a partitioned environment | Steven G. Glassen, Neal T. Christensen, Thomas O. Curlee, III, Ronald Franklin Hill, Moon J. Kim +4 more | 1998-10-06 |
| 5694612 | Self-timed interface for a network of computer processors interconnected in parallel | Derrick LeRoy Garmire, Daniel F. Casper, Christine M. Desnoyers, Frank D. Ferraiolo, Marten J. Halma +1 more | 1997-12-02 |
| 5680575 | Interconnect failure detection and cache reset apparatus | Neil G. Bartow, Louis T. Fasano, Thomas A. Gregg, Gregory Salyer, Douglas W. Westcott | 1997-10-21 |
| 5651033 | Inter-system data communication channel comprised of parallel electrical conductors that simulates the performance of a bit serial optical communications link | Thomas A. Gregg, Daniel F. Casper, Frank D. Ferraiolo | 1997-07-22 |
| 5613068 | Method for transferring data between processors on a network by establishing an address space for each processor in each other processor's | Thomas A. Gregg, Frank D. Ferraiolo, Marten J. Halma, Thomas H. Hillock, Robert E. Murray | 1997-03-18 |
| 5598442 | Self-timed parallel inter-system data communication channel | Thomas A. Gregg, Daniel F. Casper, Frank D. Ferraiolo | 1997-01-28 |
| 5577078 | Edge detector | Richard Jordan, Daniel F. Casper, Frank D. Ferraiolo, William C. Laviola, Peter Tomaszewski | 1996-11-19 |
| 5568526 | Self timed interface | Frank D. Ferraiolo, Daniel F. Casper, Richard Jordan, William C. Laviola | 1996-10-22 |
| 5522088 | Shared channel subsystem has a self timed interface using a received clock signal to individually phase align bits received from a parallel bus | Marten J. Halma, Daniel F. Casper, Frank D. Ferraiolo, Martin W. Sachs | 1996-05-28 |
| 5513377 | Input-output element has self timed interface using a received clock signal to individually phase aligned bits received from a parallel bus | Daniel F. Casper, Frederick J. Cox, Frank D. Ferraiolo, Marten J. Halma | 1996-04-30 |
| 5509122 | Configurable, recoverable parallel bus | Neil G. Bartow, Louis T. Fasano, Thomas A. Gregg, Gregory Salyer, Douglas W. Westcott | 1996-04-16 |
| 5487095 | Edge detector | Richard Jordan, Daniel F. Casper, Frank D. Ferraiolo, William C. Laviola, Peter Tomaszewski | 1996-01-23 |
| 5455831 | Frame group transmission and reception for parallel/serial buses | Neil G. Bartow, Paul J. Brown, Louis T. Fasano, Thomas A. Gregg, Gregory Salyer +2 more | 1995-10-03 |
| 5412803 | Communications system having plurality of originator and corresponding recipient buffers with each buffer having three different logical areas for transmitting messages in single transfer | Neil G. Bartow, Paul J. Brown, Louis T. Fasano, Thomas A. Gregg, Gregory Salyer +1 more | 1995-05-02 |
| 5357608 | Configurable, recoverable parallel bus | Neil G. Bartow, Louis T. Fasano, Thomas A. Gregg, Gregory Salyer, Douglas W. Westcott | 1994-10-18 |
| 5267240 | Frame-group transmission and reception for parallel/serial buses | Neil G. Bartow, Paul J. Brown, Louis T. Fasano, Thomas A. Gregg, Gregory Salyer +3 more | 1993-11-30 |
| 4675812 | Priority circuit for channel subsystem having components with diverse and changing requirement for system resources | Terrence K. Zimmerman | 1987-06-23 |
| 4604709 | Channel communicator | Frederick T. Blount, Daniel F. Casper, Lawrence R. DelSonno, Robert F. Geller, Joseph M. Kusmiss +1 more | 1986-08-05 |