Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
DM

David W. Milton

IBM: 41 patents #2,268 of 70,183Top 4%
CICintas: 2 patents #9 of 32Top 30%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
Underhill, VT: #11 of 98 inventorsTop 15%
Vermont: #145 of 4,968 inventorsTop 3%
Overall (All Time): #65,574 of 4,157,543Top 2%
45 Patents All Time

Issued Patents All Time

Showing 26–45 of 45 patents

Patent #TitleCo-InventorsDate
7536496 Method and apparatus for transmitting data in an integrated circuit W. Riyon Harding, Clarence R. Ogilvie, Jason Rotella, Paul M. Schanely, Sebastian T. Ventrone 2009-05-19
7529962 System for expanding a window of valid data Malede W. Berhanu, Christopher D. Hanudel, Mark W. Kuemerle, Clarence R. Ogilvie, Jack R. Smith 2009-05-05
7515666 Method for dynamically changing the frequency of clock signals Jason Rotella 2009-04-07
7480888 Design structure for facilitating engineering changes in integrated circuits Clarence R. Ogilvie, Charles B. Winn, Kenneth A. Lauricella, Nitin Sharma, Paul M. Schanely +4 more 2009-01-20
7451070 Optimal bus operation performance in a logic simulation environment Robert J. Devins 2008-11-11
7353131 Method and system for logic verification using mirror interface Robert J. Devins, Paul Ferro, Peter Dean LaFauci, Kenneth A. Mahler 2008-04-01
7353156 Method of switching external models in an automated system-on-chip integrated circuit design verification system Robert J. Devins, Robert D. Herzl 2008-04-01
7240266 Clock control circuit for test that facilitates an at speed structural test Henry R. Farmer, Gary D. Grise, Mark R. Taylor 2007-07-03
7065602 Circuit and method for pipelined insertion Robert S. Horton, Clarence R. Ogilvie, Paul M. Schanely, Sebastian T. Ventrone 2006-06-20
6865502 Method and system for logic verification using mirror interface Robert J. Devins, Paul Ferro, Peter Dean LaFauci, Kenneth A. Mahler 2005-03-08
6539522 Method of developing re-usable software for efficient verification of system-on-chip integrated circuit designs Robert J. Devins, Paul G. Ferro, Robert D. Herzl, Mark E. Kautzman, Kenneth A. Mahler 2003-03-25
6507230 Clock generator having a deskewer 2003-01-14
6487699 Method of controlling external models in system-on-chip verification Robert J. Devins, Robert D. Herzl, Clarence R. Ogilvie 2002-11-26
6427224 Method for efficient verification of system-on-chip integrated circuit designs including an embedded processor Robert J. Devins, Mark E. Kautzman, Kenneth A. Mahler 2002-07-30
6075415 Digital frequency multiplier Marc Turcotte, Charles B. Winn 2000-06-13
5727180 Memory including master and local word lines coupled to memory cells storing access information Andrew E. Davis 1998-03-10
5717648 Fully integrated cache architecture Andrew E. Davis 1998-02-10
5640339 Cache memory including master and local word lines coupled to memory cells Andrew E. Davis 1997-06-17
5046844 Apparatus for inspecting and hangering shirts 1991-09-10
4873878 Apparatus for inspecting and hangering pants 1989-10-17