Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11804828 | Dual duty cycle correction loop for a serializer/deserializer (SerDes) transmitter output | Jieming Qi, Daniel M. Dreps, Glen A. Wiedemeier, Eric John Lukes, Timothy O. Dickson | 2023-10-31 |
| 10998720 | T-coil enhanced ESD protection with passive equalization | Xiaobin Yuan, Joseph Natonio, Siqi Fan | 2021-05-04 |
| 10411873 | Clock data recovery broadcast for multi-lane SerDes | Brian J. Schuh, Michael R. Trombley, Robert M. Bunce | 2019-09-10 |
| 10218391 | Systems and methods providing a low-power mode for serial links | Robert M. Bunce, Victor Moy | 2019-02-26 |
| 9600232 | Aligning FIFO pointers in a data communications lane of a serial link | John J. Bergkvist, Jr., John K. Koehler, Todd E. Leonard | 2017-03-21 |
| 9184948 | Decision feedback equalizer (‘DFE’) with a plurality of independently-controlled isolated power domains | Minhan Chen, Steven M. Clements, Todd M. Rasmus | 2015-11-10 |
| 8989313 | Adaptable receiver detection | John J. Bergkvist, Jr., Steven M. Clements, Hayden C. Cranford, Jr., Todd E. Leonard | 2015-03-24 |
| 8929040 | ESD protection device for SST transmitter | Robert J. Gauthier, Jr., Junjun Li, Xingle Wang | 2015-01-06 |
| 8841893 | Dual-loop voltage regulator architecture with high DC accuracy and fast response time | John F. Bulzacchelli, Zeynep Toprak-Deniz, Daniel J. Friedman, Joseph A. Iadanza, Todd M. Rasmus | 2014-09-23 |
| 8618833 | Source series terminated driver circuit with programmable output resistance, amplitude reduction, and equalization | John J. Bergkvist, Jr., Todd E. Leonard | 2013-12-31 |
| 7995660 | Receiver termination circuit for a high speed direct current (DC) serial link | Hayden C. Cranford, Jr. | 2011-08-09 |
| 7769057 | High speed serial link output stage having self adaptation for various impairments | Steven M. Clements, Hayden C. Cranford, Jr. | 2010-08-03 |
| 7698802 | Method for manufacturing a calibration device | Steven M. Clements, William P. Cornwell, Hayden C. Cranford, Jr., Vernon R. Norman | 2010-04-20 |
| 7671678 | Serial link output stage differential amplifier and method | Hayden C. Cranford, Jr. | 2010-03-02 |
| 7570071 | Impedance calibration for source series terminated serial link transmitter | Steven M. Clements, William P. Cornwell, Hayden C. Cranford, Jr., Vernon R. Norman | 2009-08-04 |
| 7522000 | Design structure for a serial link output stage differential amplifier | Hayden C. Cranford, Jr. | 2009-04-21 |
| 7511530 | Nodal charge compensation for SST driver having data mux in output stage | Hayden C. Cranford, Jr., Kenneth J. Shaw, Marc Turcotte | 2009-03-31 |
| 7460602 | Method for performing high speed serial link output stage having self adaptation for various impairments | Steven M. Clements, Hayden C. Cranford, Jr. | 2008-12-02 |
| 7411422 | Driver/equalizer with compensation for equalization non-idealities | Steven M. Clements, Hayden C. Cranford, Jr. | 2008-08-12 |
| 7391266 | Serial link output stage differential amplifier and method | Hayden C. Cranford, Jr. | 2008-06-24 |
| 7368902 | Impedance calibration for source series terminated serial link transmitter | Steven M. Clements, William P. Cornwell, Hayden C. Cranford, Jr., Vernon R. Norman | 2008-05-06 |
| 7307447 | Self series terminated serial link transmitter having segmentation for amplitude, pre-emphasis, and slew rate control and voltage regulation for amplitude accuracy and high voltage protection | Steven M. Clements, William P. Cornwell, Hayden C. Cranford, Jr., Todd M. Rasmus | 2007-12-11 |
| 7187206 | Power savings in serial link transmitters | Steven M. Clements, Hayden C. Cranford, Jr. | 2007-03-06 |