Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6178497 | System and method for determining the relative age of instructions in a processor | Marlin Wayne Frederick, Jr., Bruce Joseph Ronchetti | 2001-01-23 |
| 5930484 | Method and system for input/output control in a multiprocessor system utilizing simultaneous variable-width bus access | James Allan Kahle | 1999-07-27 |
| 5926628 | Selectable priority bus arbitration scheme | James Allan Kahle | 1999-07-20 |
| 5913044 | Method and system for simultaneous variable-width bus access in a multiprocessor system | James Allan Kahle | 1999-06-15 |
| 5901294 | Method and system for bus arbitration in a multiprocessor system utilizing simultaneous variable-width bus access | James Allan Kahle | 1999-05-04 |
| 5893921 | Method for maintaining memory coherency in a computer system having a cache utilizing snoop address injection during a read transaction by a dual memory bus controller | Timothy Bucher, Douglas Christopher Hester, John V. Sell | 1999-04-13 |
| 5784580 | System and method for communicating between devices | — | 1998-07-21 |
| 5771372 | Apparatus for delaying the output of data onto a system bus | Dac C. Pham, Mark Sweet | 1998-06-23 |
| 5761533 | Computer system with varied data transfer speeds between system components and memory | Alfredo Aldereguia, Nader Amini, Daryl Cromer, Richard Louis Horne, Ashu Kohli +1 more | 1998-06-02 |
| 5687350 | Protocol and system for performing line-fill address during copy-back operation | Timothy Bucher, Douglas Christopher Hester, John V. Sell | 1997-11-11 |
| 5255374 | Bus interface logic for computer system having dual bus architecture | Alfredo Aldereguia, Nader Amini, Richard Louis Horne, Terence J. Lohman | 1993-10-19 |