Issued Patents All Time
Showing 51–75 of 75 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8484420 | Global and local counts for efficient memory page pinning in a multiprocessor system | Michael G. Mall | 2013-07-09 |
| 8458709 | Dynamic switching of multithreaded processor between single threaded and simultaneous multithreaded modes | William J. Armstrong, Naresh Nayar, Balaram Sinharoy | 2013-06-04 |
| 8205118 | Software component self-scrubbing | Michael E. Lyons, Basu Vaidyanathan | 2012-06-19 |
| 8140801 | Efficient and flexible memory copy operation | Ravi Kumar Arimilli, Rama K. Govindaraju, Peter Hochschild, Satya P. Sharma, Balaram Sinharoy | 2012-03-20 |
| 8127277 | Framework for conditionally executing code in an application using conditions in the framework and in the application | Andre L. Albot, Michael G. Mall | 2012-02-28 |
| 7890703 | Cache injection using semi-synchronous memory copy operation | Ravi Kumar Arimilli, Rama K. Govindaraju, Peter Hochschild, Satya P. Sharma, Balaram Sinharoy | 2011-02-15 |
| 7890727 | Key-controlled object-based memory protection | Thomas Stanley Mathews, Pratap C. Pattnaik, Ravi Shankar | 2011-02-15 |
| 7886118 | Detecting illegal reuse of memory with low resource impact | Michael E. Lyons, Jonathan Allen Wildstrom | 2011-02-08 |
| 7882321 | Validity of address ranges used in semi-synchronous memory copy operations | Ravi Kumar Arimilli, Rama K. Govindaraju, Peter Hochschild, Satya P. Sharma, Balaram Sinharoy | 2011-02-01 |
| 7793149 | Kernel error recovery disablement and shared recovery routine footprint areas | Michael G. Mall | 2010-09-07 |
| 7783920 | Recovery routine masking and barriers to support phased recovery development | Michael G. Mall | 2010-08-24 |
| 7774561 | Key-controlled object-based memory protection | Thomas Stanley Mathews, Pratap C. Pattnaik, Ravi Shankar | 2010-08-10 |
| 7536531 | Scaling address space utilization in a multi-threaded, multi-processor computer | Christopher F. McDonald, Mark D. Rogers | 2009-05-19 |
| 7523260 | Propagating data using mirrored lock caches | Ravi Kumar Arimilli, Rama K. Govindaraju, Peter Hochschild, Satya P. Sharma, Balaram Sinharoy | 2009-04-21 |
| 7506132 | Validity of address ranges used in semi-synchronous memory copy operations | Ravi Kumar Arimilli, Rama K. Govindaraju, Peter Hochschild, Satya P. Sharma, Balaram Sinharoy | 2009-03-17 |
| 7496915 | Dynamic switching of multithreaded processor between single threaded and simultaneous multithreaded modes | William J. Armstrong, Naresh Nayar, Balaram Sinharoy | 2009-02-24 |
| 7484062 | Cache injection semi-synchronous memory copy operation | Ravi Kumar Arimilli, Rama K. Govindaraju, Peter Hochschild, Satya P. Sharma, Balaram Sinharoy | 2009-01-27 |
| 7454585 | Efficient and flexible memory copy operation | Ravi Kumar Arimilli, Rama K. Govindaraju, Peter Hochschild, Satya P. Sharma, Balaram Sinharoy | 2008-11-18 |
| 7424584 | Key-controlled object-based memory protection | Thomas Stanley Mathews, Pratap C. Pattnaik, Ravi Shankar | 2008-09-09 |
| 7305526 | Method, system, and program for transferring data directed to virtual memory addresses to a device memory | Michael T. Benhase, Robert Alan Cargnoni, James Stephen Fields, Jr., Michael John Mayfield | 2007-12-04 |
| 7299336 | Scaling address space utilization in a multi-threaded, multi-processor computer | Christopher F. McDonald, Mark D. Rogers | 2007-11-20 |
| 7023459 | Virtual logical partition terminal | Richard Louis Arndt, Robert K. Foster, Walter Lipp, Kerry Alan Lucas, Casey Lee McCreary +1 more | 2006-04-04 |
| 6931471 | Method, apparatus, and computer program product for migrating data subject to access by input/output devices | Richard Louis Arndt, Luke Matthew Browning, Steven M. Thurber | 2005-08-16 |
| 6839892 | Operating system debugger extensions for hypervisor debugging | George John Dawkins | 2005-01-04 |
| 6336191 | Method and system for clock compensation in instruction level tracing in a symmetrical multi-processing system | Luc Rene Smolders | 2002-01-01 |