Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Bruce M. Gilbert — 20 Patents

IBM: 18 patents #6,142 of 70,183Top 9%
SSSequent Computer Systems: 2 patents #6 of 33Top 20%
Beaverton, OR: #305 of 3,140 inventorsTop 10%
Oregon: #2,168 of 28,073 inventorsTop 8%
Overall (All Time): #214,803 of 4,157,543Top 6%
20 Patents All Time
Bruce M. Gilbert has been granted 20 US patents while listed as an inventor at IBM. The first was granted in 1999 and the most recent in November 2013. Bruce M. Gilbert ranks #214,803 of 4,157,543 US inventors in our database (top 5.2%). Patent records list Bruce M. Gilbert in Beaverton, OR, US.

Patents per Year

Patents granted per year, 1999 to 2013Bar chart with a peak of 5 patents in 2006.peak 51999: 1 patents19992000: 1 patents2001: 1 patents20012003: 3 patents2004: 1 patents20042005: 3 patents2006: 5 patents20062007: 1 patents2008: 1 patents20082010: 1 patents2012: 1 patents20122013: 1 patents2013

Issued Patents All Time

Showing 1–20 of 20 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
8578130 Partitioning of node into more than one partition Donald R. DeSota, Robert Joersz, Wayne A. Downer 2013-11-05 $5,290,000
8250330 Memory controller having tables mapping memory addresses to memory modules Eric N. Lais, Donald R. DeSota, Michael Grassi 2012-08-21 $4,162,000
7827449 Non-inline transaction error correction Donald R. DeSota, Robert Joersz 2010-11-02 $3,442,000
7383464 Non-inline transaction error correction Donald R. DeSota, Robert Joersz 2008-06-03 $7,325,000
7210018 Multiple-stage pipeline for transaction conversion Donald R. DeSota, Robert Joersz, Thomas D. Lovett, Maged M. Michael 2007-04-24 $12,783,000
7124410 Distributed allocation of system hardware resources for multiprocessor systems Thomas B. Berg, Stacey G. Lloyd 2006-10-17 $10,414,000
7051180 Masterless building block binding to partitions using identifiers and indicators Wayne A. Downer, Thomas D. Lovett 2006-05-23 $5,226,000
7000089 Address assignment to transaction for serialization William Durr, Robert Joersz 2006-02-14 $5,958,000
6996675 Retrieval of all tag entries of cache locations for memory address and determining ECC based on same 2006-02-07 $5,045,000
6996665 Hazard queue for transaction pipeline Donald R. DeSota, Robert Joersz, Eric N. Lais, Maged M. Michael 2006-02-07 $5,045,000
6973544 Method and apparatus of using global snooping to provide cache coherence to distributed computer nodes in a single coherent system Thomas B. Berg, Thomas D. Lovett 2005-12-06 $7,444,000
6934835 Building block removal from partitions Wayne A. Downer, Thomas D. Lovett, Mehul M. Shah 2005-08-23 $5,305,000
6910108 Hardware support for partitioning a multiprocessor system to allow distinct operating systems Wayne A. Downer, Thomas D. Lovett 2005-06-21 $6,933,000
6823498 Masterless building block binding to partitions Wayne A. Downer, Thomas D. Lovett, Mehul M. Shah 2004-11-23 $4,043,000
6636944 Associative cache and method for replacing data entries having an IO state Robert Joersz, Roger L. Shelton 2003-10-21 $7,269,000
6598120 Assignment of building block collector agent to receive acknowledgments from other building block agents Thomas B. Berg 2003-07-22 $10,485,000
6591370 Multinode computer system with distributed clock synchronization system Thomas D. Lovett, Thomas B. Berg 2003-07-08 $17,066,000
6295584 Multiprocessor computer system with memory map translation Donald R. DeSota, Thomas D. Lovett, Robert J. Safranek, Kenneth Frank Dove 2001-09-25 $32,998,000
6041376 Distributed shared memory system having a first node that prevents other nodes from accessing requested data until a processor on the first node controls the requested data Robert T. Joersz, Thomas D. Lovett, Robert J. Safranek 2000-03-21
5900020 Method and apparatus for maintaining an order of write operations by processors in a multiprocessor computer to maintain memory consistency Robert J. Safranek, Thomas D. Lovett, Robert T. Joersz 1999-05-04 $10,014,000