BR

Barry J. Rubin

IBM: 17 patents #6,502 of 70,183Top 10%
UU University Of Illinois At Urbana-Champaign: 1 patents #4 of 48Top 9%
Overall (All Time): #278,154 of 4,157,543Top 7%
17
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8146043 Huygens' box methodology for signal integrity analysis Lijun Jiang, Jason D. Morsey, Weng C. Chew, Mao-kun Li, Yuan-Lung Liu 2012-03-27
7933751 Method, apparatus and computer program providing broadband preconditioning based on reduced coupling for numerical solvers Peter Feldmann, Jason D. Morsey 2011-04-26
7933752 Method, apparatus and computer program providing broadband preconditioning based on a reduced coupling for numerical solvers Peter Feldmann, Jason D. Morsey 2011-04-26
7849028 Electrical package analysis gateway 2010-12-07
7844435 Integrated circuit chip having on-chip signal integrity and noise verification using frequency dependent RLC extraction and modeling techniques Michael Alexander Bowen, Alina Deutsch, Gerard V. Kopcsay, Byron L. Krauter, Howard H. Smith +1 more 2010-11-30
7707527 Huygens' box methodology for signal integrity analysis Lijun Jiang, Jason D. Morsey, Weng C. Chew, Mao-Kin Li, Yuan-Lung Liu 2010-04-27
7418370 Method, apparatus and computer program providing broadband preconditioning based on reduced coupling for numerical solvers Peter Feldmann, Jason D. Morsey 2008-08-26
7319946 Method for on-chip signal integrity and noise verification using frequency dependent RLC extraction and modeling techniques Michael Alexander Bowen, Alina Deutsch, Gerard V. Kopcsay, Byron L. Krauter, Howard H. Smith +1 more 2008-01-15
7093206 Computer aided design method and apparatus for modeling and analyzing on-chip interconnect structures Minakshisundaran Balasubramanian Anand, Matthew S. Angyal, Alina Deutsch, Ibrahim M. Elfadel, Gerard V. Kopcsay +1 more 2006-08-15
7038553 Scalable computer system having surface-mounted capacitive couplers for intercommunication Robert B. Garner, Winfried W. Wilcke, Howard Kahn 2006-05-02
6963204 Method to include delta-I noise on chip using lossy transmission line representation for the power mesh Alina Deutsch, Gerard V. Kopcsay, Byron L. Krauter, Howard H. Smith 2005-11-08
6704669 Method for determining voltage, current, and/or power distributions in a resistive structure using a rectangular grid algorithm modified for non-rectangular holes and contacts Anita A. Mayo 2004-03-09
6684380 Intelligent structure simplification to facilitate package analysis of complex packages Erik Breiland 2004-01-27
6282692 Structure for improved capacitance and inductance calculation 2001-08-28
6192507 Method for generating an electrical circuit comprising dielectrics Albert E. Ruehli 2001-02-20
5006918 Floating orthogonal line structure for X-Y wiring planes Alina Deutsch 1991-04-09
4398106 On-chip Delta-I noise clamping circuit Evan E. Davidson, George A. Katopis 1983-08-09