Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Robert B. Garner — 10 Patents

Oracle: 5 patents #2,558 of 14,854Top 20%
IBM: 5 patents #18,770 of 70,183Top 30%
San Jose, CA: #6,421 of 32,062 inventorsTop 25%
California: #61,378 of 386,348 inventorsTop 20%
Overall (All Time): #481,000 of 4,157,543Top 15%
10 Patents All Time
Robert B. Garner has been granted 10 US patents while listed as an inventor at IBM. The first was granted in 1989 and the most recent in June 2009. Robert B. Garner ranks #481,000 of 4,157,543 US inventors in our database (top 11.6%). Patent records list Robert B. Garner in San Jose, CA, US.

Patents per Year

Patents granted per year, 1989 to 2009Bar chart with a peak of 3 patents in 1992.peak 31989: 1 patents19891992: 3 patents19921998: 1 patents19982006: 1 patents20062007: 2 patents20072008: 1 patents20082009: 1 patents2009

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7552758 Method for high-density packaging and cooling of high-powered compute and storage server blades Winfried W. Wilcke 2009-06-30 $31,543,000
7385457 Flexible capacitive coupler assembly and method of manufacture Steven A. Cordes, Matthew J. Farinelli, Winfried W. Wilcke 2008-06-10 $5,963,000
7242579 System and method for providing cooling in a three-dimensional infrastructure for massively scalable computers Kenneth R. Fernandez, Claudio Fleiner, Harald Huels, Manfred Ries, Winfried W. Wilcke 2007-07-10 $9,309,000
7206194 Mechanism for self-alignment of communications elements in a modular electronic system Winfried W. Wilcke, Richard M. Williams 2007-04-17 $6,339,000
7038553 Scalable computer system having surface-mounted capacitive couplers for intercommunication Winfried W. Wilcke, Barry J. Rubin, Howard Kahn 2006-05-02 $4,743,000
5845325 Virtual address write back cache with address reassignment and cache block flush William Loo, John E. Watkins, William N. Joy, Joseph P. Moran, III, William Shannon +1 more 1998-12-01 $26,630,000
5159680 Risc processing unit which selectively isolates register windows by indicating usage of adjacent register windows in status register William N. Joy 1992-10-27 $19,962,000
5109514 Method and apparatus for executing concurrent CO processor operations and precisely handling related exceptions Kwang G. Tan, Donald C. Jackson 1992-04-28 $16,751,000
5083263 BISC with interconnected register ring and selectively operating portion of the ring as a conventional computer William N. Joy 1992-01-21 $42,197,000
4884198 Single cycle processor/cache interface Anant Agrawal 1989-11-28 $6,879,000