Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10089136 | Monitoring performance of transient virtual volumes created for a virtual machine | Minjie Zhang, Yue Zhao, Peiyu Zhuang | 2018-10-02 |
| 10037156 | Techniques for converging metrics for file- and block-based VVols | Peiyu Zhuang, Minjie Zhang, Yue Zhao | 2018-07-31 |
| 10031180 | Leakage power characterization at high temperatures for an integrated circuit | Diyanesh B. Chinnakkonda Vidyapoornachary, Anand Haridass, Charles R. Lefurgy, Spandana V. Rachamalla | 2018-07-24 |
| 10007747 | Cross-current power modelling using logic simulation | Arya Madhusoodanan, Rahul M. Rao, Suriya T. Skariah | 2018-06-26 |
| 10002220 | On the fly netlist compression in power analysis | Rahul M. Rao | 2018-06-19 |
| 9996649 | On the fly netlist compression in power analysis | Rahul M. Rao | 2018-06-12 |
| 9990454 | Early analysis and mitigation of self-heating in design flows | Nagashyamala R. Dhanwada, William W. Dungan, Sungjae Lee, Arjen A. Mets, Michael R. Scheuermann +3 more | 2018-06-05 |
| 9983814 | Techniques for aggregating metrics for VVols within a storage container | Peiyu Zhuang, Minjie Zhang, Yue Zhao | 2018-05-29 |
| 9916406 | Cross-current power modelling using logic simulation | Arya Madhusoodanan, Rahul M. Rao, Suriya T. Skariah | 2018-03-13 |
| 9754058 | Cross-current power modelling using logic simulation | Arya Madhusoodanan, Rahul M. Rao, Suriya T. Skariah | 2017-09-05 |
| 9697306 | Formal verification driven power modeling and design verification | Anand Haridass, Pradeep Kumar Nalla, Rahul M. Rao | 2017-07-04 |
| 9684465 | Memory power management and data consolidation | Diyanesh B. Chinnakkonda Vidyapoornachary, Edgar R. Cordero, Anand Haridass | 2017-06-20 |
| 9606741 | Memory power management and data consolidation | Diyanesh B. Chinnakkonda Vidyapoornachary, Edgar R. Cordero, Anand Haridass | 2017-03-28 |
| 9471239 | Memory power management and data consolidation | Diyanesh B. Chinnakkonda Vidyapoornachary, Edgar R. Cordero, Anand Haridass | 2016-10-18 |
| 9460251 | Formal verification driven power modeling and design verification | Anand Haridass, Pradeep Kumar Nalla, Rahul M. Rao | 2016-10-04 |
| 9288042 | Securely and redundantly storing encryption credentials system and method | Manish Madhukar, Jeffrey A. Brown, Rahul Pradhan, Jaleel A. Kazi, Jeffrey A. Blakeslee | 2016-03-15 |
| 9217771 | Method for breaking down hardware power into sub-components | Nagashyamala R. Dhanwada, Anand Haridass, Charles R. Lefurgy, Diwesh Pandey | 2015-12-22 |