Issued Patents All Time
Showing 1–25 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11682452 | Local bit select with improved fast read before write suppression | Dongho Lee, Genadi Tverskoy, Zhiying Chen, Brian James Yavoich | 2023-06-20 |
| 10454477 | Dynamic decode circuit low power application | — | 2019-10-22 |
| 10374604 | Dynamic decode circuit low power application | — | 2019-08-06 |
| 10367507 | Dynamic decode circuit with active glitch control | Paul A. Bunce, Yuen H. Chan, John D. Davis | 2019-07-30 |
| 10320388 | Dynamic decode circuit with active glitch control method | Paul A. Bunce, Yuen H. Chan, John D. Davis | 2019-06-11 |
| 10312916 | Dynamic decode circuit with delayed precharge | Paul A. Bunce, Yuen H. Chan, John D. Davis | 2019-06-04 |
| 10312915 | Dynamic decode circuit with active glitch control method | Paul A. Bunce, Yuen H. Chan, John D. Davis | 2019-06-04 |
| 10224933 | Dynamic decode circuit with active glitch control | Paul A. Bunce, Yuen H. Chan, John D. Davis | 2019-03-05 |
| 9966958 | Dynamic decode circuit with active glitch control | Paul A. Bunce, Yuen H. Chan, John D. Davis | 2018-05-08 |
| 9742408 | Dynamic decode circuit with active glitch control | Paul A. Bunce, Yuen H. Chan, John D. Davis | 2017-08-22 |
| 8638595 | Global bit select circuit with write around capability | — | 2014-01-28 |
| 8233331 | Single clock dynamic compare circuit | Yuen H. Chan, Richard Edward Serton, Arthur D. Tuminaro | 2012-07-31 |
| 8184475 | Robust local bit select circuitry to overcome timing mismatch | Rajiv V. Joshi, Rouwaida N. Kanj, Sudesh Saroop | 2012-05-22 |
| 7592851 | High performance pseudo dynamic pulse controllable multiplexer | Yuen H. Chan, Ann H. Chen, Shie-ei Wang | 2009-09-22 |
| 7463537 | Global bit select circuit interface with dual read and write bit line pairs | Yuen H. Chan, Ryan T. Freese, Arthur D. Tuminaro | 2008-12-09 |
| 7336546 | Global bit select circuit with dual read and write bit line pairs | Yuen H. Chan, Ryan T. Freese, Arthur D. Tuminaro | 2008-02-26 |
| 7293209 | Split L2 latch with glitch free programmable delay | Yuen H. Chan, Ryan T. Freese | 2007-11-06 |
| 7272030 | Global bit line restore timing scheme and circuit | Yuen H. Chan, Ryan T. Freese, Uma Srinivasan, Arthur D. Tuminaro, Jatinder K. Wadhwa | 2007-09-18 |
| 7170774 | Global bit line restore timing scheme and circuit | Yuen H. Chan, Ryan T. Freese, Uma Srinivasan, Arthur D. Tuminaro, Jatinder K. Wadhwa | 2007-01-30 |
| 7170799 | SRAM and dual single ended bit sense for an SRAM | Yuen H. Chan, Timothy Charest, Rajiv V. Joshi | 2007-01-30 |
| 7113433 | Local bit select with suppression of fast read before write | Yuen H. Chan, Ryan T. Freese, Arthur D. Tuminaro | 2006-09-26 |
| 7102946 | Local bit select circuit with slow read recovery scheme | — | 2006-09-05 |
| 7084673 | Output driver with pulse to static converter | Yuen H. Chan, Jatinder K. Wadhwa, Otto Wagner | 2006-08-01 |
| 7054184 | Cache late select circuit | Yuen H. Chan, Timothy Charest, John R. Rawlins | 2006-05-30 |
| 6868000 | Coupled body contacts for SOI differential circuits | Yuen H. Chan, Rajiv V. Joshi | 2005-03-15 |