Issued Patents All Time
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6788112 | High performance dual-stage sense amplifier circuit | Yuen H. Chan, Rajiv V. Joshi, John R. Rawlins, Jatinder K. Wadhwa | 2004-09-07 |
| 6646544 | Self timed pre-charged address compare logic circuit | — | 2003-11-11 |
| 5982203 | Two stage SRCMOS sense amplifier | — | 1999-11-09 |
| 5764656 | Method for a fast scan GRA cell circuit | Peter Tsung-shih Liu, Gerard Joseph Scharff | 1998-06-09 |
| 5748643 | Fast scan GRA cell circuit | Peter Tsung-shih Liu, Gerard Joseph Scharff | 1998-05-05 |
| 5740412 | Set-select multiplexer with an array built-in self-test feature | Yuen H. Chan, Pong-Fei Lu | 1998-04-14 |
| 5614849 | Method of resetting a CMOS amplifier | — | 1997-03-25 |
| 5576644 | Fast edge triggered self-resetting CMOS receiver with parallel L1/L2 (master/slave) latch | — | 1996-11-19 |
| 5568076 | Method of converting short duration input pulses to longer duration output pulses | Yuen H. Chan | 1996-10-22 |
| 5552745 | Self-resetting CMOS multiplexer with static output driver | Yuen H. Chan | 1996-09-03 |
| 5528178 | Sense and hold amplifier | — | 1996-06-18 |
| 5465060 | Fast edge triggered self-resetting CMOS receiver with parallel L1/L2 (Master/Slave) latch | — | 1995-11-07 |