Issued Patents All Time
Showing 51–62 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6181614 | Dynamic repair of redundant memory array | Charles P. Geer | 2001-01-30 |
| 6172531 | Low power wordline decoder circuit with minimized hold time | Peter Thomas Freiburger | 2001-01-09 |
| 6060909 | Compound domino logic circuit including an output driver section with a latch | Gregory J. Uhlmann | 2000-05-09 |
| 5991208 | Write multiplexer apparatus and method for multiple write port programmable memory | Peter Thomas Freiburger, Peder James Paulson | 1999-11-23 |
| 5991224 | Global wire management apparatus and method for a multiple-port random access memory | Peter Thomas Freiburger, Peder James Paulson | 1999-11-23 |
| 5835502 | Method and apparatus for handling variable data word widths and array depths in a serial shared abist scheme | Todd A. Christensen, Leland Leslie Day, Paul Allen Ganfield, Murali Vaddigiri, Paul Wong | 1998-11-10 |
| 5778243 | Multi-threaded cell for a memory | Todd A. Christensen, Binta M. Patel, Nghia Van Phan, Michael J. Rohn, Salvatore N. Storino +2 more | 1998-07-07 |
| 5359557 | Dual-port array with storage redundancy having a cross-write operation | Dennis Thomas Cox | 1994-10-25 |
| 5166552 | Multi-emitter BICMOS logic circuit family with superior performance | Gerard Boudon, Allan H. Dansky, Pierre Mollier, Ieng Ong, Nghia V. Phan +3 more | 1992-11-24 |
| 4910574 | Porous circuit macro for semiconductor integrated circuits | Dennis Thomas Cox, Joseph M. Fitzgerald | 1990-03-20 |
| 4849904 | Macro structural arrangement and method for generating macros for VLSI semiconductor circuit devices | Douglas M. Dewanz, Joseph M. Fitzgerald | 1989-07-18 |
| 4618943 | Semiconductor static read/write memory having an additional read-only capability | Joseph M. Fitzgerald, Philip T. Wu | 1986-10-21 |