Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8780604 | State sensing system for eFuse memory | Chihhung Liao, Phu Nguyen, Vimal R. Patel, George Paulik, Peder James Paulson +1 more | 2014-07-15 |
| 7268590 | Method and apparatus for implementing subthreshold leakage reduction in LSDL | Jerry Chang Jui Kao, Chung-Tao Li, Christophe Robert Tretz | 2007-09-11 |
| 7224633 | eFuse sense circuit | William Paul Hovis, Alan J. Leslie, Phil C. Paone, David W. Siljenberg, Gregory J. Uhlmann | 2007-05-29 |
| 7203518 | Method and apparatus for simplified data dispensation to and from digital systems | Gregory J. Uhlmann | 2007-04-10 |
| 7142061 | Balanced single ended to differential signal converter | — | 2006-11-28 |
| 6775624 | Method and apparatus for estimating remaining life of a product | — | 2004-08-10 |
| 6748556 | Changing the thread capacity of a multithreaded computer processor | Gregory J. Uhlmann | 2004-06-08 |
| 6681345 | Field protection against thread loss in a multithreaded computer processor | Gregory J. Uhlmann | 2004-01-20 |
| 6617518 | Enhanced flex cable | Stephen J. Ames, Michael J. Connell, Eugene Distad, Bart O. McCoy | 2003-09-09 |
| 6266800 | System and method for eliminating effects of parasitic bipolar transistor action in dynamic logic using setup time determination | Gregory J. Uhlmann | 2001-07-24 |
| 6163173 | Method and apparatus for implementing adjustable logic threshold in dynamic circuits for maximizing circuit performance | Gregory J. Uhlmann, Robert R. Williams | 2000-12-19 |
| 6084810 | Dynamic logic circuit with bitline repeater circuit | Gregory J. Uhlmann | 2000-07-04 |
| 5973971 | Device and method for verifying independent reads and writes in a memory array | Gregory J. Uhlmann | 1999-10-26 |
| 5778243 | Multi-threaded cell for a memory | Anthony Gus Aipperspach, Todd A. Christensen, Binta M. Patel, Nghia Van Phan, Michael J. Rohn +2 more | 1998-07-07 |