GP

George Paulik

IBM: 26 patents #4,008 of 70,183Top 6%
Overall (All Time): #150,520 of 4,157,543Top 4%
26
Patents All Time

Issued Patents All Time

Showing 25 most recent of 26 patents

Patent #TitleCo-InventorsDate
12322912 Plug count limiter for cables Kevin M. O'Connell, Timothy C. Buchholtz, George Russell Zettles, IV, Karl Erickson, Jarrett Betke +2 more 2025-06-03
11990949 Radio frequency signal integrity verification Kevin Daniel Escobar, Layne A. Berge, George Russell Zettles, IV, Daniel Ramirez, Jarrett Betke +3 more 2024-05-21
11695424 Distortion reduction circuit Jarrett Betke, George Russell Zettles, IV, Timothy J. Lindquist, Timothy C. Buchholtz, Karl Erickson +1 more 2023-07-04
11551101 Real time cognitive reasoning using a circuit with varying confidence level alerts Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann 2023-01-10
11526768 Real time cognitive reasoning using a circuit with varying confidence level alerts Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann 2022-12-13
10802062 Cognitive analysis using applied analog circuits Karl R. Erickson, Phil C. Paone, David P. Paulsen, Raymond A. Richetta, John E. Sheets, II +1 more 2020-10-13
10732931 Negative operand compatible charge-scaling subtractor circuit Phil C. Paone, David P. Paulsen, John E. Sheets, II, Karl R. Erickson, Gregory J. Uhlmann 2020-08-04
10671348 Charge-scaling multiplier circuit with dual scaled capacitor sets David P. Paulsen, Phil C. Paone, John E. Sheets, II, Karl R. Erickson 2020-06-02
10670642 Real time cognitive monitoring of correlations between variables Karl R. Erickson, Phil C. Paone, David P. Paulsen, Raymond A. Richetta, John E. Sheets, II +1 more 2020-06-02
10663502 Real time cognitive monitoring of correlations between variables Karl R. Erickson, Phil C. Paone, David P. Paulsen, Raymond A. Richetta, John E. Sheets, II +1 more 2020-05-26
10658993 Charge-scaling multiplier circuit with digital-to-analog converter David P. Paulsen, Phil C. Paone, John E. Sheets, II, Karl R. Erickson 2020-05-19
10659258 Matching transmitter impedance to receiver termination using an average of transmitter output voltage samples Daniel Ramirez, Eric John Lukes, Henry Michael Newshutz, Raymond A. Richetta 2020-05-19
10598710 Cognitive analysis using applied analog circuits Karl R. Erickson, Phil C. Paone, David P. Paulsen, Raymond A. Richetta, John E. Sheets, II +1 more 2020-03-24
10592209 Charge-scaling multiplier circuit David P. Paulsen, Phil C. Paone, John E. Sheets, II, Karl R. Erickson 2020-03-17
10587282 Charge-scaling adder circuit David P. Paulsen, Phil C. Paone, John E. Sheets, II, Karl R. Erickson, Gregory J. Uhlmann 2020-03-10
10566987 Charge-scaling subtractor circuit David P. Paulsen, Phil C. Paone, John E. Sheets, II, Karl R. Erickson, Gregory J. Uhlmann 2020-02-18
10367520 Charge-scaling subtractor circuit David P. Paulsen, Phil C. Paone, John E. Sheets, II, Karl R. Erickson, Gregory J. Uhlmann 2019-07-30
10348320 Charge-scaling adder circuit David P. Paulsen, Phil C. Paone, John E. Sheets, II, Karl R. Erickson, Gregory J. Uhlmann 2019-07-09
10236050 Optimizing data approximation analysis using low power circuitry Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann 2019-03-19
10224089 Optimizing data approximation analysis using low bower circuitry Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann 2019-03-05
10043568 Optimizing data approximation analysis using low power circuitry Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann 2018-08-07
10037792 Optimizing data approximation analysis using low power circuitry Karl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann 2018-07-31
8780604 State sensing system for eFuse memory Chihhung Liao, Phu Nguyen, Vimal R. Patel, Peder James Paulson, Brian Joy Reed +1 more 2014-07-15
7506282 Apparatus and methods for predicting and/or calibrating memory yields Chad A. Adams, Anthony Gus Aipperspach 2009-03-17
7400550 Delay mechanism for unbalanced read/write paths in domino SRAM arrays Chad A. Adams, Anthony Gus Aipperspach, Derick G. Behrends 2008-07-15