NM

Noboru Moriuchi

HI Hitachi: 15 patents #2,636 of 28,497Top 10%
HE Hitachi Vlsi Engineering: 4 patents #189 of 666Top 30%
ND Nitto Denko: 1 patents #1,580 of 2,479Top 65%
RT Renesas Technology: 1 patents #1,991 of 3,337Top 60%
Overall (All Time): #302,251 of 4,157,543Top 8%
16
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6794118 Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process Yoshihiko Okamoto 2004-09-21
RE38296 Semiconductor memory device with recessed array region Yoshiki Yamaguchi, Toshihiko Tanaka, Norio Hasegawa, Yoshifumi Kawamoto, Shin Kimura +2 more 2003-11-04
RE37996 Manufacturing method or an exposing method for a semiconductor device or a semiconductor integrated circuit device and a mask used therefor Fumio Mizuno, Seiichiro Shirai, Masayuki Morita 2003-02-18
6153357 Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process Yoshihiko Okamoto 2000-11-28
5753416 Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process Yoshihiko Okamoto 1998-05-19
5736300 Manufacturing method or an exposing method for a semiconductor device or a semiconductor integrated circuit device and a mask used therefor Fumio Mizuno, Seiichiro Shirai, Masayuki Morita 1998-04-07
5725971 Method of manufacturing phase shift masks and a method of manufacturing semiconductor integrated circuit devices Seiichirou Shirai, Toshihiko Onozuka 1998-03-10
5667941 Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process Yoshihiko Okamoto 1997-09-16
5578422 Manufacturing method or an exposing method for a semiconductor device or a semiconductor integrated circuit device and a mask used therefor Fumio Mizuno, Seiichiro Shirai, Masayuki Morita 1996-11-26
5466325 Resist removing method, and curable pressure-sensitive adhesive, adhesive sheets and apparatus used for the method Fumio Mizuno, Seiichiro Shirai, Yutaka Moroishi, Makoto Sunakawa, Michirou Kawanishi 1995-11-14
5455144 Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process Yoshihiko Okamoto 1995-10-03
5436095 Manufacturing method or an exposing method for a semiconductor device for a semiconductor integrated circuit device and a mask used therefor Fumio Mizuno, Seiichiro Shirai, Masayuki Morita 1995-07-25
5405810 Alignment method and apparatus Fumio Mizuno, Seiichiro Shirai 1995-04-11
5298365 Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process Yoshihiko Okamoto 1994-03-29
5196910 Semiconductor memory device with recessed array region Yoshiki Yamaguchi, Toshihiko Tanaka, Norio Hasegawa, Yoshifumi Kawamoto, Shin Kimura +2 more 1993-03-23
4882289 Method of making a semiconductor memory device with recessed array region Yoshiki Yamaguchi, Toshihiko Tanaka, Norio Hasegawa, Yoshifumi Kawamoto, Shin Kimura +2 more 1989-11-21