Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6624443 | Display device with an improved contact hole arrangement for contacting a semiconductor layer through an insulation film | Hideo Tanabe, Shigeo Shimomura, Masaaki Kurita, Yasukazu Kimura, Takao Nakamura | 2003-09-23 |
| 6573546 | Semiconductor integrated circuit device and process for manufacturing the same | Kiyonori Ohyu, Aritoshi Sugimoto, Yoshitaka Tadaki, Makoto Ogasawara, Masashi Horiguchi +2 more | 2003-06-03 |
| 6570184 | Thin film transistor and method for manufacturing the same | Kazuhiko Horikoshi, Klyoshi Ogata, Takuo Tamura, Miwako Nakahara, Ryoji Oritsuki +2 more | 2003-05-27 |
| 6479867 | Thin film transistor | Toshihiko Itoga, Takeo Shiba, Toshiki Kaneko | 2002-11-12 |
| 6452213 | SEMICONDUCTOR DEVICE HAVING FIRST, SECOND AND THIRD NON-CRYSTALLINE FILMS SEQUENTIALLY FORMED ON INSULATING BASE WITH SECOND FILM HAVING THERMAL CONDUCTIVITY NOT LOWER THAN THAT OF FIRST FILM AND NOT HIGHER THAN THAT OF THIRD FILM, AND METHOD OF MANUFACTURING THE SAME | Yoshinobu Kimura, Takeo Shiba, Takahiro Kamo, Yoshiyuki Kaneko | 2002-09-17 |
| 6291847 | Semiconductor integrated circuit device and process for manufacturing the same | Kiyonori Ohyu, Aritoshi Sugimoto, Yoshitaka Tadaki, Makoto Ogasawara, Masashi Horiguchi +2 more | 2001-09-18 |
| 6226079 | Defect assessing apparatus and method, and semiconductor manufacturing method | Kazuo Takeda, Seiichi Isomae, Kyoko Minowa, Muneo Maeshima, Shigeru Matsui +2 more | 2001-05-01 |
| 4984038 | Semiconductor memory and method of producing the same | Hideo Sunami, Masanobu Miyao, Kikuo Kusukawa, Masahiro Moniwa, Shinichiro Kimura +2 more | 1991-01-08 |
| 4937641 | Semiconductor memory and method of producing the same | Hideo Sunami, Masanobu Miyao, Kikuo Kusukawa, Masahiro Moniwa, Shinichiro Kimura +2 more | 1990-06-26 |
| 4695856 | Semiconductor device | Terunori Warabisako, Masanobu Miyao | 1987-09-22 |
| 4670768 | Complementary MOS integrated circuits having vertical channel FETs | Hideo Sunami, Shinichiro Kimura | 1987-06-02 |
| 4609407 | Method of making three dimensional semiconductor devices in selectively laser regrown polysilicon or amorphous silicon layers | Tamura Masao, Hirotsugu Kozuka, Yasuo Wada, Tamura Hiroshi, Takashi Tokuyama +3 more | 1986-09-02 |
| 4599133 | Method of producing single-crystal silicon film | Masanobu Miyao, Iwao Takemoto, Masao Tamura | 1986-07-08 |
| 4570175 | Three-dimensional semiconductor device with thin film monocrystalline member contacting substrate at a plurality of locations | Masanobu Miyao, Iwao Takemoto, Terunori Warabisako, Kiichiro Mukai, Ryo Haruta +3 more | 1986-02-11 |
| 4565584 | Method of producing single crystal film utilizing a two-step heat treatment | Masao Tamura, Masanobu Miyao, Nobuyoshi Natsuaki, Naotsugu Yoshihiro, Takashi Tokuyama +1 more | 1986-01-21 |
| 4498951 | Method of manufacturing single-crystal film | Masao Tamura, Naotsugu Yoshihiro, Nobuyoshi Natsuaki, Masanobu Miyao, Hideo Sunami +1 more | 1985-02-12 |
| 4394191 | Stacked polycrystalline silicon film of high and low conductivity layers | Yasuo Wada, Hiroo Usui, Masanobu Miyao, Masao Tamura, Takashi Tokuyama | 1983-07-19 |
| 4351674 | Method of producing a semiconductor device | Isao Yoshida, Yasuo Wada, Masao Tamura, Masanobu Miyao, Nobuyoshi Natsuaki +1 more | 1982-09-28 |