Issued Patents All Time
Showing 1–25 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6864559 | Semiconductor memory device | Shinji Nakazato, Hideaki Uchida, Yoshikazu Saito, Masahiro Yamamura, Yutaka Kobayashi +7 more | 2005-03-08 |
| 6740958 | Semiconductor memory device | Shinji Nakazato, Hideaki Uchida, Yoshikazu Saito, Masahiro Yamamura, Yutaka Kobayashi +7 more | 2004-05-25 |
| 6208010 | Semiconductor memory device | Shinji Nakazato, Hideaki Uchida, Yoshikazu Saito, Masahiro Yamamura, Yutaka Kobayashi +7 more | 2001-03-27 |
| 5808951 | Semiconductor memory | Hiroo Masuda, Kunihiko Ikuzaki, Hiroshi Kawamoto | 1998-09-15 |
| 5732037 | Semiconductor memory | Hiroo Masuda, Kunihiko Ikuzaki, Hiroshi Kawamoto | 1998-03-24 |
| 5689457 | Semiconductor Memory | Hiroo Masuda, Kunihiko Ikuzaki, Hiroshi Kawamoto | 1997-11-18 |
| 5629898 | Dynamic memory device, a memory module, and a method of refreshing a dynamic memory device | Youji Idei, Masakazu Aoki, Hiromasa Noda, Katsuyuki Sato, Hidetoshi Iwai +5 more | 1997-05-13 |
| 5550781 | Semiconductor apparatus with two activating modes of different number of selected word lines at refreshing | Ken Sugawara, Shigeru Sakairi, Mikio Matoba, Toshio Sasaki, Katsutaka Kimura | 1996-08-27 |
| 5497023 | Semiconductor memory device having separately biased wells for isolation | Shinji Nakazato, Hideaki Uchida, Yoshikasu Saito, Masahiro Yamamura, Yutaka Kobayashi +7 more | 1996-03-05 |
| 5467314 | Method of testing an address multiplexed dynamic RAM | Kazuyuki Miyazawa, Jun Etoh, Katsutaka Kimura | 1995-11-14 |
| 5448520 | Semiconductor memory | Hiroo Masuda, Kunihiko Ikuzaki, Hiroshi Kawamoto | 1995-09-05 |
| 5430681 | Memory cartridge and its memory control method | Ken Sugawara, Shigeru Sakairi, Mikio Matoba, Toshio Sasaki, Katsutaka Kimura | 1995-07-04 |
| 5386135 | Semiconductor CMOS memory device with separately biased wells | Shinji Nakazato, Hideaki Uchida, Yoshikazu Saito, Masahiro Yamamura, Yutaka Kobayashi +7 more | 1995-01-31 |
| 5381531 | Data processor for selective simultaneous execution of a delay slot instruction and a second subsequent instruction the pair following a conditional branch instruction | Makoto Hanawa, Tadahiko Nishimukai, Makoto Suzuki | 1995-01-10 |
| 5365478 | Semiconductor memory | Hiroo Masuda, Kunihiko Ikuzaki, Hiroshi Kawamoto | 1994-11-15 |
| 5331596 | Address multiplexed dynamic RAM having a test mode capability | Kazuyuki Miyazawa, Jun Etoh, Katsutaka Kimura | 1994-07-19 |
| 5324982 | Semiconductor memory device having bipolar transistor and structure to avoid soft error | Shinji Nakazato, Hideaki Uchida, Yoshikazu Saito, Masahiro Yamamura, Yutaka Kobayashi +7 more | 1994-06-28 |
| 5253197 | Semiconductor associative memory device with current sensing | Makoto Suzuki, Suguru Tachibana, Hisayuki Higuchi, Takehisa Hayashi, Makoto Hanawa +1 more | 1993-10-12 |
| 5237528 | Semiconductor memory | Hideo Sunami, Tokuo Kure, Masanobu Miyao, Yoshifumi Kawamoto, Yoshio Sakai +4 more | 1993-08-17 |
| 5214496 | Semiconductor memory | Hideo Sunami, Tokuo Kure, Masanobu Miyao, Yoshifumi Kawamoto, Yoshio Sakai +4 more | 1993-05-25 |
| 5170374 | Semiconductor memory | Hiroo Masuda, Kunihiko Ikuzaki | 1992-12-08 |
| 5148387 | Logic circuit and data processing apparatus using the same | Kazuo Yano, Koichiro Ishibashi, Tetsuya Nakagawa, Osamu Minato | 1992-09-15 |
| 5148255 | Semiconductor memory device | Shinji Nakazato, Hideaki Uchida, Yoshikazu Saito, Masahiro Yamamura, Yutaka Kobayashi +7 more | 1992-09-15 |
| 5134581 | Highly stable semiconductor memory with a small memory cell area | Koichiro Ishibashi, Katsuro Sasaki, Toshiaki Yamanaka, Naotaka Hashimoto, Takashi Hashimoto +1 more | 1992-07-28 |
| 5132771 | Semiconductor memory device having flip-flop circuits | Toshiaki Yamanaka, Naotaka Hashimoto, Takashi Hashimoto, Akihiro Shimizu, Koichiro Ishibashi +9 more | 1992-07-21 |