Issued Patents All Time
Showing 26–50 of 73 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10572150 | Memory network with memory nodes controlling memory accesses in the memory network | Sheng Li, Norman Paul Jouppi, Michael R. Krause | 2020-02-25 |
| 10516806 | Processing color image of first color space into renderable image of second color space | Juan Manuel Garcia Reyero Vinas, Jan Morovic, Peter Morovic | 2019-12-24 |
| 10452472 | Tunable and dynamically adjustable error correction for memristor crossbars | Catherine Graves, John Paul Strachan, Dejan S. Milojicic, Martin Foltin, Sergey Serebryakov | 2019-10-22 |
| 10324644 | Memory side accelerator thread assignments | Kaisheng Ma, Qiong Cai, Cong Xu | 2019-06-18 |
| 10324722 | Global capabilities transferrable across node boundaries | Dejan S. Milojicic, Chris I. Dalton | 2019-06-18 |
| 10303622 | Data write to subset of memory devices | Rajeev Balasubramonian, Naveen Muralimanohar, Gregg B. Lesartre, Jishen Zhao | 2019-05-28 |
| 10282302 | Programmable memory-side cache management for different applications | Qiong Cai | 2019-05-07 |
| 10254988 | Memory device write based on mapping | Rajeev Balasubramonian, Gregg B. Lesartre, Robert Schreiber, Jishen Zhao, Naveen Muralimanohar | 2019-04-09 |
| 10241911 | Modification of multiple lines of cache chunk before invalidation of lines | Gabriel Parmer, Dejan S. Milojicic | 2019-03-26 |
| 10146699 | Mapping apertures of different sizes | Mark David Lillibridge | 2018-12-04 |
| 10127282 | Partitionable ternary content addressable memory (TCAM) for use with a bloom filter | Sheng Li, Kevin T. Lim, Dejan S. Milojicic | 2018-11-13 |
| 10108351 | Reallocate memory pending queue based on stall | Qiong Cai, Cong Xu, Ping-Hsien Chi, Sai Rahul Chalamalasetti, Andrew C. Walton | 2018-10-23 |
| 10089498 | Memory integrity checking | Nigel Edwards, Chris I. Dalton | 2018-10-02 |
| 10025663 | Local checkpointing using a multi-level cell | Doe Hyun Yoon, Robert Schreiber, Jichuan Chang, Naveen Muralimanohar, Parthasarathy Ranganathan | 2018-07-17 |
| 9952975 | Memory network to route memory traffic and I/O traffic | Dwight L. Barron, Norman Paul Jouppi, Michael R. Krause, Sheng Li | 2018-04-24 |
| 9823986 | Memory node error correction | Sheng Li, Norman Paul Jouppi, Doe Hyun Yoon, Dwight L. Barron | 2017-11-21 |
| 9792182 | Checkpoint generation | Sudarsun Kannan, Moray McLaren, Dejan S. Milojicic, Robert Schreiber | 2017-10-17 |
| 9614728 | Identifying network communication patterns | Moray McLaren, Dejan S. Milojicic, Robert Schreiber | 2017-04-04 |
| 9184982 | Balancing the allocation of virtual machines in cloud systems | Abhishek Gupta, Dejan S. Milojicic | 2015-11-10 |
| 9143403 | Autonomous metric tracking and adjustment | Dejan S. Milojicic, Dwight L. Barron | 2015-09-22 |
| 9098581 | Method for finding text reading order in a document | Sherif Yacoub, Daniel Ortega, Jose Abad Peiro | 2015-08-04 |
| 9063750 | Mapping high-performance computing applications to platforms | Abhishek Gupta, Dejan S. Milojicic | 2015-06-23 |
| 8948511 | Automated document processing system | Daniel Ortega, Sherif Yacoub, Jose Abad Peiro | 2015-02-03 |
| 8812400 | Managing a memory segment using a memory virtual appliance | Moray McLaren, Antonio Lain, Jose Renato G. Santos | 2014-08-19 |
| 8516271 | Securing non-volatile memory regions | Parthasarathy Ranganathan, Naveen Muralimanohar | 2013-08-20 |