Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6931515 | Method and system for using dynamic, deferred operation information to control eager deferral of control-speculative loads | Dale Morris | 2005-08-16 |
| 6895491 | Memory addressing for a virtual machine implementation on a computer processor supporting virtual hash-page-table searching | Todd Kjos, Christophe de Dinechin | 2005-05-17 |
| 6665793 | Method and apparatus for managing access to out-of-frame Registers | Achmed R. Zahir, Cary A. Coutant, Carol L. Thompson | 2003-12-16 |
| 6505296 | Emulated branch effected by trampoline mechanism | Dale Morris, James O. Hays, Jerome C. Huck | 2003-01-07 |
| 6430670 | Apparatus and method for a virtual hashed page table | William R. Bryg, Stephen G. Burger, James O. Hays, John M. Kessenich, Gary N. Hammond +2 more | 2002-08-06 |
| 6408373 | Method and apparatus for pre-validating regions in a virtual addressing scheme | Stephen G. Burger, James O. Hays, William R. Bryg, Rajiv Gupta, Gary N. Hammond +1 more | 2002-06-18 |
| 6393544 | Method and apparatus for calculating a page table index from a virtual address | William R. Bryg, Stephen G. Burger, Gary N. Hammond, James O. Hays, Jerome C. Huck +2 more | 2002-05-21 |
| 6367005 | System and method for synchronizing a register stack engine (RSE) and backing memory image with a processor's execution of instructions during a state saving context switch | Achmed R. Zahir | 2002-04-02 |
| 6263401 | Method and apparatus for transferring data between a register stack and a memory resource | Cary A. Coutant, Carol L. Thompson, Achmed R. Zahir | 2001-07-17 |
| 6230248 | Method and apparatus for pre-validating regions in a virtual addressing scheme | Stephen G. Burger, James O. Hays, William R. Bryg, Rajiv Gupta, Gary N. Hammon +1 more | 2001-05-08 |
| 6219783 | Method and apparatus for executing a flush RS instruction to synchronize a register stack with instructions executed by a processor | Achmed R. Zahir | 2001-04-17 |
| 6216214 | Apparatus and method for a virtual hashed page table | William R. Bryg, Stephen G. Burger, James O. Hays, John M. Kessenich, Gary N. Hammond +2 more | 2001-04-10 |
| 6115777 | LOADRS instruction and asynchronous context switch | Achmed R. Zahir | 2000-09-05 |
| 6112292 | Code sequence for asynchronous backing store switch utilizing both the cover and LOADRS instructions | Achmed R. Zahir | 2000-08-29 |
| 6088780 | Page table walker that uses at least one of a default page size and a page size selected for a virtual address space to position a sliding field in a virtual address | Koichi Yamada, Gary N. Hammond, Jim Hays, Stephen G. Burger, William R. Bryg | 2000-07-11 |
| 6065114 | Cover instruction and asynchronous backing store switch | Achmed R. Zahir, Carol L. Thompson, Cary A. Coutant, Prasad Raje, Sunil Saxena | 2000-05-16 |
| 5940872 | Software and hardware-managed translation lookaside buffer | Gary N. Hammond, Koichi Yamada, Stephen G. Burger, James O. Hays, William R. Bryg | 1999-08-17 |
| 5915117 | Computer architecture for the deferral of exceptions on speculative instructions | Jack Mills, James O. Hays, Stephen G. Burger, Dale Morris, Carol L. Thompson +4 more | 1999-06-22 |